Author's Latest Posts


Chiplet-Level HI of Polymer-Based Circuits For Fabricating Flexible Electronic-Photonic Integrated Devices


A technical paper titled "Flexible electronic-photonic 3D integration from ultrathin polymer chiplets" was published by researchers at Dartmouth College and Boston University. The paper states: "Here, we present a robust chiplet-level heterogeneous integration of polymer-based circuits (CHIP), where ultrathin polymer electronic and optoelectronic chiplets are vertically bonded at room tempe... » read more

Lightweight, High-Performance CPU Extension for Protected Key Handles with CPU-Enforced Usage (CISPA, Ruhr Univ. Bochum)


A new technical paper titled "KeyVisor -- A Lightweight ISA Extension for Protected Key Handles with CPU-enforced Usage Policies" was published by researchers at CISPA Helmholtz Center for Information Security and Ruhr University Bochum. Abstract "The confidentiality of cryptographic keys is essential for the security of protection schemes used for communication, file encryption, and outsou... » read more

Multi-Faceted Spin Orbit Torque Phenomena in GdCo (Berkeley)


A new technical paper titled "Tunable multistate field-free switching and ratchet effect by spin-orbit torque in canted ferrimagnetic alloy" was published by researchers at UC Berkeley and Lawrence Berkeley National Laboratory. The paper states: "Spin-orbit torque is not only a useful probe to study manipulation of magnetic textures and magnetic states at the nanoscale but also it carries g... » read more

High-NA EUV Lithography: Enhancing Resolution By Split Pupil Exposure (Fraunhofer, ASML)


A new technical paper titled "Resolution enhancement for high-numerical aperture extreme ultraviolet lithography by split pupil exposures: a modeling perspective" was published by researchers at Fraunhofer IISB and ASML. The open source paper published on SPIE states: "The lithographic imaging performance of extreme ultraviolet (EUV) lithography is limited by the efficiency of light diffrac... » read more

Strain Engineering in 2D FETs (UCSB)


A new technical paper titled "Strain engineering in 2D FETs: Physics, status, and prospects" was published by researchers at UC Santa Barbara. "In this work, we explore the physics and evaluate the merits of strain engineering in two-dimensional van der Waals semiconductor-based FETs (field-effect-transistors) using DFT (density functional theory) to determine the modulation of the channel m... » read more

TFETs: Design and Operation, Including Material Selection and Simulation Methods


A new technical paper titled "Multiscale Simulation and Machine Learning Facilitated Design of Two-Dimensional Nanomaterials-Based Tunnel Field-Effect Transistors: A Review" was published by researchers at University of Chicago and Argonne National Lab. Abstract "Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transi... » read more

Multi-Node, Virtualized Neuromorphic Architecture


A new technical paper titled "NeuroVM: Dynamic Neuromorphic Hardware Virtualization" was published by researchers at Stanford University, UT Austin and Temsa Research & Development Center. Abstract "This paper introduces a novel approach in neuromorphic computing, integrating heterogeneous hardware nodes into a unified, massively parallel architecture. Our system transcends traditional ... » read more

Rowhammer Protection By Addressing Root Cause (Georgia Tech)


A new technical paper titled "Preventing Rowhammer Exploits via Low-Cost Domain-Aware Memory Allocation" was published by researchers at Georgia Tech. Abstract "Rowhammer is a hardware security vulnerability at the heart of every system with modern DRAM-based memory. Despite its discovery a decade ago, comprehensive defenses remain elusive, while the probability of successful attacks grows ... » read more

Review Paper: Challenges Required To Bring the Energy Consumption Down in Microelectronics (Rice, UC Berkeley, Georgia Tech, Et al.)


A new review article titled "Roadmap on low-power electronics" by researchers at Rice University, UC Berkeley, Georgia Tech, TSMC, Intel, Harvard, et al. This roadmap to energy efficient electronics written by numerous collaborators covers materials, modeling, architectures, manufacturing, metrology and more. Find the technical paper here. September 2024. Ramamoorthy Ramesh, Sayeef Sal... » read more

Gold Substrate Plays Boosts Performance of Tellurium-Based Memristors


A new technical paper titled "Non-Volatile Resistive Switching in Nanoscaled Elemental Tellurium by Vapor Transport Deposition on Gold" was published by researchers at Politecnico di Milano, UT Austin, and STMicroelectronics. Abstract: "Two-dimensional (2D) materials are promising for resistive switching in neuromorphic and in-memory computing, as their atomic thickness substantially impr... » read more

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