Author's Latest Posts

Open-Source And Royalty-Free Confidential Computing For Embedded RISC-V Systems (IBM, Max Planck)
By Technical Paper Link - 20 May, 2025 - Comments: 0

A new technical paper titled "ACE: Confidential Computing for Embedded RISC-V Systems" was published by researchers at IBM Research, IBM T.J. Watson Research Center, Max Planck Institute for Software Systems (MPI-SWS). Abstract "Confidential computing plays an important role in isolating sensitive applications from the vast amount of untrusted code commonly found in the modern cloud. We a... » read more

Energy-Aware DL: The Interplay Between NN Efficiency And Hardware Constraints (Imperial College London, Cambridge)
By Technical Paper Link - 20 May, 2025 - Comments: 0

A new technical paper titled "Energy-Aware Deep Learning on Resource-Constrained Hardware" was published by researchers at Imperial College London and University of Cambridge. Abstract "The use of deep learning (DL) on Internet of Things (IoT) and mobile devices offers numerous advantages over cloud-based processing. However, such devices face substantial energy constraints to prolong batte... » read more

Air-Gap Covert Channel Attack On Spread Spectrum Modulated Clocks (IETR, Lab-STICC)
By Technical Paper Link - 20 May, 2025 - Comments: 0

A new technical paper titled "Clock-to-Clock Modulation Covert Channel" was published by researchers at University of Rennes-INSA Rennes-IETR-UMR  and University of South Brittany/Lab-STICC- UMR CNRS. Abstract "Various Electromagnetic (EM) attacks have been developed to modulate and utilize EM emanations for covert communication, including exploiting processors, memory modules, and periphe... » read more

Cache Side-Channel Attacks On LLMs (MITRE, WPI)
By Technical Paper Link - 18 May, 2025 - Comments: 0

A new technical paper titled "Spill The Beans: Exploiting CPU Cache Side-Channels to Leak Tokens from Large Language Models" was published by researchers at MITRE and Worcester Polytechnic Institute. Abstract "Side-channel attacks on shared hardware resources increasingly threaten confidentiality, especially with the rise of Large Language Models (LLMs). In this work, we introduce Spill The... » read more

Demonstration Of EUV Scatterometry On A 2D Periodic Interconnect
By Technical Paper Link - 18 May, 2025 - Comments: 0

A new technical paper titled "Coherent EUV scatterometry of 2D periodic structure profiles with mathematically optimal experimental design" was published by researchers at University of Colorado, NIST, Samsung and KMLAbs. Abstract "Extreme ultraviolet (EUV) scatterometry is an increasingly important metrology that can measure critical parameters of periodic nanostructured materials in a fas... » read more

Customizing A LLM Model For VHDL Design of High-Performance MPUs (IBM)
By Technical Paper Link - 18 May, 2025 - Comments: 0

A new technical paper titled "Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors" was published by researchers at IBM. Abstract "The use of Large Language Models (LLMs) in hardware design has taken off in recent years, principally through its incorporation in tools that increase chip designer productivity. There has been considerable discussion about the ... » read more

Floorplanning Method For Reducing Thermally-Induced Structural Stress In Chiplet Packages (Penn State, Intel, ASU et al.)
By Technical Paper Link - 14 May, 2025 - Comments: 0

A new technical paper titled "STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration" was published by researchers at Pennsylvania State University, Intel, Arizona State University and University of Notre Dame. Abstract "Chiplet-based architectures and advanced packaging has emerged as transformative approaches in semiconductor design. While conventional ph... » read more

Novel Thin Film Growth Technique Of A WBG Sulfide Semiconductor in BEOL Compatible Conditions (USC, LBNL, TSMC)
By Technical Paper Link - 14 May, 2025 - Comments: 0

A new technical paper titled "Textured growth and electrical characterization of Zinc Sulfide on back-end-of-the-line (BEOL) compatible substrates" was published by researchers at USC, Lawrence Berkeley National Laboratory and TSMC. Abstract "Scaling of transistors has enabled continuous improvements in logic device performance, especially through materials engineering. However, surpassing ... » read more

Effects Of Hardware Prefetchers For Scientific Application Kernels Running on High-End Processors
By Technical Paper Link - 14 May, 2025 - Comments: 0

A new technical paper titled "Memory Prefetching Evaluation of Scientific Applications on A Modern HPC Arm-based Processor" was published by researchers at Jülich Supercomputing Centre and KTH Royal Institute of Technology. Abstract "Memory prefetching is a well-known technique for mitigating the negative impact of memory access latencies on memory bandwidth. This problem has become more p... » read more

CFETs: Reliability of Complementary Field-Effect Transistors (TU Munich, IIT)
By Technical Paper Link - 14 May, 2025 - Comments: 0

A technical paper titled "CFET Beyond 3 nm: SRAM Reliability under Design-Time and Run-Time Variability" was published by researchers at TU Munich and IIT Kanpur. Abstract "This work investigates the reliability of complementary field-effect transistors (CFETs) by addressing both design-time variability arising from process variations and run-time variability due to temperature and aging ef... » read more

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