Author's Latest Posts


State of the Art And Future Directions of Rowhammer (ETH Zurich)


A new technical paper titled "Fundamentally Understanding and Solving RowHammer" was published by researchers at ETH Zurich. Abstract "We provide an overview of recent developments and future directions in the RowHammer vulnerability that plagues modern DRAM (Dynamic Random Memory Access) chips, which are used in almost all computing systems as main memory. RowHammer is the phenomenon in... » read more

Spiking Neural Networks: Hardware & Algorithm Developments


A new technical paper titled "Exploring Neuromorphic Computing Based on Spiking Neural Networks: Algorithms to Hardware" was published by researchers at Purdue University, Pennsylvania State University, and Yale University. Excerpt from Abstract: "In this article, we outline several strides that neuromorphic computing based on spiking neural networks (SNNs) has taken over the recent past, a... » read more

SW-HW Framework: Graphic Rendering on RISC-V GPUs (Georgia Tech, Cal Poly)


A new technical paper titled "Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs" was published by researchers at Georgia Tech, California Polytechnic State University-San Luis Obispo. Abstract Excerpt: "In this work, we present Skybox, a full-stack open-source GPU architecture with integrated software, compiler, hardware, and simulation environment, that enables end-to-end G... » read more

EUV Lithography: Results of Single Particle Volume Charging Processes in EUV Exposure Environment With Focus On Afterglow Effects


A new technical paper titled "Particle charging during pulsed EUV exposures with afterglow effect" was published by researchers at ASML, ISTEQ B.V., and Eindhoven University of Technology. Abstract "The nanoparticle charging processes along with background spatial-temporal plasma profile have been investigated with 3DPIC simulation in a pulsed EUV exposure environment. It is found that the ... » read more

Automated Tool Flow From Domain-Specific Languages To Generate Massively Parallel Accelerators on HBM-Equipped FPGAs


A new technical paper titled "Automatic Creation of High-bandwidth Memory Architectures from Domain-specific Languages: The Case of Computational Fluid Dynamics" was published by researchers at Politecnico di Milano and TU Dresden. The paper states "In this article, we propose an automated tool flow from a domain-specific language for tensor expressions to generate massively parallel acceler... » read more

New Group Of Non-vdW 2D Materials Derived From Non-Layered Crystals Exhibiting Ultra Low Exfoliation Energies


A new technical paper titled "A New Group of 2D Non-van der Waals Materials with Ultra Low Exfoliation Energies" was published by TU Dresden, HZDR, and Aalto University. Abstract: "The exfoliation energy—quantifying the energy required to extract a two-dimensional (2D) sheet from the surface of a bulk material—is a key parameter determining the synthesizability of 2D compounds. Here, ... » read more

Hybrid Hardware Fuzzer, Combining Capabilities of Formal Verification Methods And Fuzzing Tools


A new technical paper titled "HyPFuzz: Formal-Assisted Processor Fuzzing" was published by researchers at Texas A&M University and Technische Universität Darmstadt. Abstract: "Recent research has shown that hardware fuzzers can effectively detect security vulnerabilities in modern processors. However, existing hardware fuzzers do not fuzz well the hard-to-reach design spaces. Consequently,... » read more

Digital Neuromorphic Processor: Algorithm-HW Co-design (imec / KU Leuven)


A technical paper titled "Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design" was published by researchers at imec and KU Leuven. "In this work, we open the black box of the digital neuromorphic processor for algorithm designers by presenting the neuron processing instruction set and detailed energy consumption of the SENeCA neuromorphic architect... » read more

Vertical Nanowire Gate-All-Around FETs based on the GeSn-Material System Grown on Si


A new technical paper titled "Vertical GeSn nanowire MOSFETs for CMOS beyond silicon" was published by researchers at Peter Grünberg Institute 9, JARA, RWTH Aachen University, CEA, LETI, University of Grenoble Alpes, University of Leeds, and IHP. "Here, we present high performance, vertical nanowire gate-all-around FETs based on the GeSn-material system grown on Si. While the p-FET transcon... » read more

Power Semiconductor Devices: Thermal Management and Packaging


A technical paper titled "Thermal management and packaging of wide and ultra-wide bandgap power devices: a review and perspective" was published by researchers at Virginia Polytechnic Institute and State University, U.S. Naval Research Laboratory, and Univ Lyon, CNRS. "This paper provides a timely review of the thermal management of WBG and UWBG power devices with an emphasis on packaged dev... » read more

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