Author's Latest Posts


Design Considerations and Recent Advancements in Chiplets (UC Berkeley/ Peking University)


A new technical paper titled "Automated Design of Chiplets" was published by researchers at UC Berkeley and Peking University. Abstract: "Chiplet-based designs have gained recognition as a promising alternative to monolithic SoCs due to their lower manufacturing costs, improved re-usability, and optimized technology specialization. Despite progress made in various related domains, the des... » read more

Scalable, Shared-L1-Memory Manycore RISC-V System


A new technical paper titled "MemPool: A Scalable Manycore Architecture with a Low-Latency Shared L1 Memory" was published by researchers at ETH Zurich and University of Bologna. Abstract: "Shared L1 memory clusters are a common architectural pattern (e.g., in GPGPUs) for building efficient and flexible multi-processing-element (PE) engines. However, it is a common belief that these tightly... » read more

Autonomous Driving: End-to-End Surround 3D Camera Perception System (NVIDIA)


A new technical paper titled "NVAutoNet: Fast and Accurate 360∘ 3D Visual Perception For Self Driving" was published by researchers at NVIDIA. Abstract "Robust real-time perception of 3D world is essential to the autonomous vehicle. We introduce an end-to-end surround camera perception system for self-driving. Our perception system is a novel multi-task, multi-camera network which takes a... » read more

Overview of Machine Learning Algorithms Used In Hardware Security (TU Delft)


A new technical paper titled "A Survey on Machine Learning in Hardware Security" was published by researchers at TU Delft. Abstract "Hardware security is currently a very influential domain, where each year countless works are published concerning attacks against hardware and countermeasures. A significant number of them use machine learning, which is proven to be very effective in ... » read more

Gem5 Simulation Environment With Customized RISC-V Instructions for LIM Architectures


A new technical paper titled "Simulation Environment with Customized RISC-V Instructions for Logic-in-Memory Architectures" was published by researchers at National Tsing-Hua University, Politecnico di Torino, University of Rome Tor Vergata, and University of Twente. Abstract "Nowadays, various memory-hungry applications like machine learning algorithms are knocking "the memory wall". Tow... » read more

RF Energy Harvesting and Wireless Power Transfer Technologies: Latest Technology & Future Develop Opportunities


A new technical paper titled "RF Energy Harvesting and Wireless Power Transfer for Energy Autonomous Wireless Devices and RFIDs" was published by researchers at Institut Polytechnique de Paris, Universidade de Aveiro, The Hague, McGill University, University of Bordeaux, Polytechnique Montreal, and others. Abstract: "Radio frequency (RF) energy harvesting and wireless power transmission (... » read more

Ferroelectric Polarization in an Elementary Substance or Single-Element Compound


A technical paper titled "Two-dimensional ferroelectricity in a single-element bismuth monolayer" was published by researchers at National University of Singapore, Zhejiang University, Tianjin University, and University of Chinese Academy of Sciences. Abstract "Ferroelectric materials are fascinating for their non-volatile switchable electric polarizations induced by the spontaneous inversi... » read more

Low-Power Heterogeneous Compute Cluster For TinyML DNN Inference And On-Chip Training


A new technical paper titled "DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training" was published by researchers at University of Bologna and ETH Zurich. Abstract "On-chip deep neural network (DNN) inference and training at the Extreme-Edge (TinyML) impose strict latency, throughput, accuracy, and flexibility requirements. Heterogeneous clus... » read more

Google’s TPU v4 Architecture: 3 Major Features


A new technical paper titled "TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings" was published by researchers at Google. Abstract: "In response to innovations in machine learning (ML) models, production workloads changed radically and rapidly. TPU v4 is the fifth Google domain specific architecture (DSA) and its third supercomputer f... » read more

Surface-Activated ALD For Room-Temperature Bonding of Al2O3


A new technical paper titled "Room-temperature bonding of Al2O3 thin films deposited using atomic layer deposition" was published by researchers at Kyushu University. Abstract "In this study, room-temperature wafer bonding of Al2O3 thin films on Si thermal oxide wafers, which were deposited using atomic layer deposition (ALD), was realized using the surface-activated bonding (SAB) metho... » read more

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