Author's Latest Posts

Neural Architecture & Hardware Accelerator Co-Design Framework (Princeton/ Stanford)
By Technical Paper Link - 12 Dec, 2022 - Comments: 0

A new technical paper titled "CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework" was published by researchers at Princeton University and Stanford University. "Recently, automated co-design of machine learning (ML) models and accelerator architectures has attracted significant attention from both the industry and academia. However, most co-design frameworks either... » read more

New Method to Measure, At The Wafer Scale, Direct Bonding Energies (CEA-LETI)
By Technical Paper Link - 12 Dec, 2022 - Comments: 0

A new technical paper titled "Double cantilever beam bonding energy measurement using confocal IR microscopy" was published by researchers at Univ. Grenoble Alpes, CEA-LETI and SOITEC, Parc Technologique des Fontaines. "A new technique is assessed in order to measure, at the wafer scale, direct bonding energies. It is derived from the standard Double Cantilever Beam (DCB) method and uses int... » read more

2D-Materials-Based Electronic Circuits (KAUST and TSMC)
By Technical Paper Link - 06 Dec, 2022 - Comments: 0

A special edition article titled "Electronic Circuits made of 2D Materials" was just published by Dr. Mario Lanza, KAUST Associate Professor of Material Science and Engineering, and Iuliana Radu, corporate researcher at TSMC. This special issue covers 21 articles from leading subject matter experts, ranging from materials synthesis and their integration in micro/nano-electronic devices and c... » read more

Rubbery Schottky Diodes Based on Soft, Stretchy Electronic Materials (Penn State)
By Technical Paper Link - 06 Dec, 2022 - Comments: 0

A new technical paper titled "Fully rubbery Schottky diode and integrated devices" was published by researchers at Penn State University. The Office of Naval Research and the National Science Foundation funded this research. "Here, we report a fully rubbery Schottky diode constructed all based on stretchable electronic materials, including a liquid metal cathode, a rubbery semiconductor, and... » read more

Hardware Security: New Mathematical Model To Quantify Information Flow in Digital Circuits For Different Attack Models (RWTH Aachen)
By Technical Paper Link - 06 Dec, 2022 - Comments: 0

A new technical paper titled "Quantitative Information Flow for Hardware: Advancing the Attack Landscape" was published by researchers at RWTH Aachen University. Abstract: "Security still remains an afterthought in modern Electronic Design Automation (EDA) tools, which solely focus on enhancing performance and reducing the chip size. Typically, the security analysis is conducted by hand, l... » read more

HW-Enabled Security Techniques To Improve Platform Security And Data Protection For Cloud Data Centers And Edge Computing (NIST)
By Technical Paper Link - 06 Dec, 2022 - Comments: 0

A technical paper titled "Hardware-Enabled Security: Enabling a Layered Approach to Platform Security for Cloud and Edge Computing Use Cases" was published by NIST, Intel, AMD, Arm, IBM, Cisco and Scarfone Cybersecurity. Abstract: "In today’s cloud data centers and edge computing, attack surfaces have shifted and, in some cases, significantly increased. At the same time, hacking has becom... » read more

Fabricating FeFET Devices with Silicon-Doped Hafnium Oxide As A Ferroelectric Layer
By Technical Paper Link - 06 Dec, 2022 - Comments: 0

A new technical paper titled "Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimization in HfO2-Based FeFETs for In-Memory-Computing Applications" was published by researchers at Fraunhofer IPMS, GlobalFoundries, and TU Bergakademie Freiberg. Abstract (partial) "This article reports an improvement in the performance of the hafnium oxide-based (HfO2) ferroelectric... » read more

An Arrangement of Chiplets That Outperforms A Grid Arrangement (ETH Zurich / U. of Bologna)
By Technical Paper Link - 01 Dec, 2022 - Comments: 0

A research paper titled "HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement" was published by researchers at ETH Zurich and University of Bologna. Abstract: "2.5D integration is an important technique to tackle the growing cost of manufacturing chips in advanced technology nodes. This poses the challenge of providing high-performance inter-chiplet interconnects ... » read more

Hardware Trojans Target Coherence Systems in Chiplets (Texas A&M / NYU)
By Technical Paper Link - 01 Dec, 2022 - Comments: 0

A technical paper titled "Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems" was published by researchers at Texas A&M University and NYU. Abstract: "As industry moves toward chiplet-based designs, the insertion of hardware Trojans poses a significant threat to the security of these systems. These systems rely heavily on cache coherence for coherent data communic... » read more

HW Security: Fingerprints Of Digital Circuits Using Electromagnetic Side-Channel Sensing & Simulations (Georgia Tech)
By Technical Paper Link - 01 Dec, 2022 - Comments: 0

A technical paper titled "Circuit Activity Fingerprinting Using Electromagnetic Side-Channel Sensing and Digital Circuit Simulations" was published by researchers at Georgia Tech. The work "introduces a novel circuit identification method based on “fingerprints” of periodic circuit activity that does not rely on any circuit-specific reference measurements. We capture these “fingerprint... » read more

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