Author's Latest Posts


Lithography Modeling: Data Augmentation Framework


A new technical paper titled "An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design" was published by researchers at the University of Texas at Austin, Nvidia, and the California Institute of Technology. Abstract: "Lithography modeling is a crucial problem in chip design to ensure a chip design mask is manufacturable. It requires rigorous simulation... » read more

Profile-Guided HW/SW Mechanism To Efficiently Reduce Branch Mispredictions In Data Center Applications (Best Paper Award)


A new technical paper titled "Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications" was published by researchers at University of Michigan, ARM, University of California, Santa Cruz, and Texas A&M University. This work was awarded a best paper award at October's 2022 Institute of Electrical and Electronics Engineers (IEEE)/Association for Computing Machin... » read more

Stabilizing A Hafnium Oxide-Based Thin Film When Sandwiched Between A Metal Substrate And An Electrode


A technical paper titled "Origin of Ferroelectric Phase Stabilization via the Clamping Effect in Ferroelectric Hafnium Zirconium Oxide Thin Films" was published by researchers at University of Virginia, Brown University, Sandia National Labs, and Oak Ridge National Lab. Funding was given by U.S. DOE's 3D Ferroelectric Microelectronics Energy Frontier Research Center and the SRC. "This study ... » read more

Approximate Adders Suitable For In-Memory Computing Using a Memristor Crossbar Array


A new technical paper titled "IMAGIN: Library of IMPLY and MAGIC NOR Based Approximate Adders for In-Memory Computing" was published by researchers at DFKI (German Research Center for Artificial Intelligence) and Indian Institute of Information Technology Guwahati. "We developed a framework to generate approximate adder designs with varying output errors for 8, 12, and 16-bit adders. We imp... » read more

Memory and Energy-Efficient Batch Normalization Hardware


A new technical paper titled "LightNorm: Area and Energy-Efficient Batch Normalization Hardware for On-Device DNN Training" was published by researchers at DGIST (Daegu Gyeongbuk Institute of Science and Technology). The work was supported by Samsung Research Funding Incubation Center. Abstract: "When training early-stage deep neural networks (DNNs), generating intermediate features via con... » read more

Multi-Bit In-Memory Computing System for HDC using FeFETs, Achieving SW-Equivalent-Accuracies


A new technical paper titled "Achieving software-equivalent accuracy for hyperdimensional computing with ferroelectric-based in-memory computing" by researchers at University of Notre Dame, Fraunhofer Institute for Photonic Microsystems, University of California Irvine, and Technische Universität Dresden. "We present a multi-bit IMC system for HDC using ferroelectric field-effect transistor... » read more

Semiconductor Manufacturing: Tradeoffs Between Performance, Energy Consumption & Cybersecurity Controls


A new research paper titled "Simulating Energy and Security Interactions in Semiconductor Manufacturing: Insights from the Intel Minifab Model" was published by researchers at Idaho National Laboratory, University of Texas at Austin, University of Texas at San Antonio and George Mason University. Abstract: "Semiconductor manufacturing is a highly complex. Fabrication plants must deal with r... » read more

Using More Germanium In Chips for Energy Efficiency & Achievable Clock Frequencies


A new technical paper titled "Composition Dependent Electrical Transport in Si1−xGex Nanosheets with Monolithic Single-Elementary Al Contacts" was published by researchers at TU Wien (Vienna University of Technology), Johannes Kepler University, CEA-LETI, and Swiss Federal Laboratories for Materials Science and Technology. Find the technical paper here. Published September 2022. Abstrac... » read more

Cost Characteristics of the 2.5D Chiplet-Based SiP System


A technical paper titled "Cost-Aware Exploration for Chiplet-Based Architecture with Advanced Packaging Technologies" was published by researchers at UCSB, University of California, Santa Barbara. Abstract: "The chiplet-based System-in-Package~(SiP) technology enables more design flexibility via various inter-chiplet connection and heterogeneous integration. However, it is not known how to ... » read more

Energy of Computing As A Key Design Aspect (SLAC/Stanford, MIT)


A technical paper titled "Trends in Energy Estimates for Computing in AI/Machine Learning Accelerators, Supercomputers, and Compute-Intensive Applications" was published by researchers at SLAC/Stanford University and MIT. Abstract: "We examine the computational energy requirements of different systems driven by the geometrical scaling law, and increasing use of Artificial Intelligence or Ma... » read more

← Older posts Newer posts →