Author's Latest Posts

EPFL’s Open Source Single-Core RISC-V Microcontroller for Edge Computing
By Technical Paper Link - 30 Apr, 2023 - Comments: 0

A new technical paper titled "X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller" was published by researchers at Ecole Polytechnique Fédérale de Lausanne (EPFL). Abstract: "In this work, we present eXtendible Heterogeneous Energy-Efficient Platform (X-HEEP), a configurable and extendible single-core RISC-V-based ultra-low-power microcontroller. X-HEEP can be used ... » read more

Using The Schottky Barrier Transistor in Various Applications & Material Systems
By Technical Paper Link - 30 Apr, 2023 - Comments: 0

A new technical review paper titled "The Schottky barrier transistor in emerging electronic devices" was published by researchers at THM University of Applied Sciences, Chalmers University of Technology, CNRS, University Grenoble Alpes and others. Abstract "This paper explores how the Schottky barrier (SB) transistor is used in a variety of applications and material systems. A discussion of... » read more

Hardware-Accelerated RTL Simulator
By Technical Paper Link - 26 Apr, 2023 - Comments: 0

A technical paper titled "Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism" was published by researchers at EPFL, University of Tokyo, Sharif University, and Indian Institute of Technology. Abstract "The demise of Moore's Law and Dennard Scaling has revived interest in specialized computer architectures and accelerators. Verification and testing of thi... » read more

Information flow policies for NVM Technologies
By Technical Paper Link - 26 Apr, 2023 - Comments: 0

A new technical paper titled "Automated Information Flow Analysis for Integrated Computing-in-Memory Modules" was published by researchers at RWTH Aachen University. Abstract: "Novel non-volatile memory (NVM) technologies offer high-speed and high-density data storage. In addition, they overcome the von Neumann bottleneck by enabling computing-in-memory (CIM). Various computer architectures... » read more

RISC-V Vectorization And Potential for HPC
By Technical Paper Link - 26 Apr, 2023 - Comments: 0

A new technical paper titled "Test-driving RISC-V Vector hardware for HPC" was published by researchers at University of Edinburgh. Abstract: "Whilst the RISC-V Vector extension (RVV) has been ratified, at the time of writing both hardware implementations and open source software support are still limited for vectorisation on RISC-V. This is important because vectorisation is crucial to obt... » read more

Overview Of EV Charging Infrastructure, The Role of Power Electronics, And Charging Technologies
By Technical Paper Link - 26 Apr, 2023 - Comments: 0

A technical paper titled "Charging Infrastructure and Grid Integration for Electromobility" was published by researchers at Universidad de los Andes, University of Cambridge, Duke University, Universidad Técnica Federico Santa Maria, University of Toronto, TU Delft, and University of Florence. Abstract "Electric vehicle (EV) charging infrastructure will play a critical role in decarbonizat... » read more

Data-Centric Reconfigurable Array Chiplets (Princeton)
By Technical Paper Link - 21 Apr, 2023 - Comments: 0

A technical paper titled "Massive Data-Centric Parallelism in the Chiplet Era" was published by researchers at Princeton University. Abstract: "Traditionally, massively parallel applications are executed on distributed systems, where computing nodes are distant enough that the parallelization schemes must minimize communication and synchronization to achieve scalability. Mapping communica... » read more

CAN Bus Security Using TDCs (ETH Zurich & CISPA Helmholtz Center)
By Technical Paper Link - 21 Apr, 2023 - Comments: 0

A technical paper titled "EdgeTDC: On the Security of Time Difference of Arrival Measurements in CAN Bus Systems" was published by researchers at ETH Zurich and CISPA Helmholtz Center for Information Security. Abstract "A Controller Area Network (CAN bus) is a message- based protocol for intra-vehicle communication designed mainly with robustness and safety in mind. In real-world deployment... » read more

Hyperscale HW Optimized Neural Architecture Search (Google)
By Technical Paper Link - 21 Apr, 2023 - Comments: 0

A new technical paper titled "Hyperscale Hardware Optimized Neural Architecture Search" was published by researchers at Google, Apple, and Waymo. "This paper introduces the first Hyperscale Hardware Optimized Neural Architecture Search (H2O-NAS) to automatically design accurate and performant machine learning models tailored to the underlying hardware architecture. H2O-NAS consists of three ... » read more

Optimizing The Growth And Transfer Process of Graphene (Cambridge, RWTH Aachen)
By Technical Paper Link - 21 Apr, 2023 - Comments: 0

A technical paper titled "Putting High-Index Cu on the Map for High-Yield, Dry-Transferred CVD Graphene" was published by researchers at University of Cambridge, RWTH Aachen University, and National Institute for Materials Science. Abstract: "Reliable, clean transfer and interfacing of 2D material layers are technologically as important as their growth. Bringing both together remains a ch... » read more

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