Author's Latest Posts

Building A Robust Hardware Security Program

Even mature chip development teams and processes aren’t immune to security errors. While many semiconductor and hardware manufacturing organizations have mature development processes, existing security testing practices, and formal signoff requirements, the complexity and duration of the chip lifecycle creates many opportunities for security issues to be overlooked. Semiconductors now play... » read more

3 Steps To Capturing Effective Hardware Security Requirements

As hardware vulnerabilities continue to rise, it’s increasingly crucial for those developing semiconductors to reduce consumer and business risk by establishing comprehensive security programs. These should include a systematic process for developing security requirements, verifying them at scale throughout the design process, and producing final documentation for security signoff before tape... » read more

Radix Coverage For Hardware Common Weakness Enumeration (CWE) Guide

MITRE's hardware Common Weakness Enumeration (CWE) database aggregates hardware weaknesses that are the root causes of vulnerabilities in deployed parts. A complete list can be found on the MITRE Hardware Design Webpage. Hardware CWEs are ideal to be used alongside internally developed security requirements databases and have been developed and submitted by both government and commercial design... » read more

Detecting And Preventing Automotive Hardware Security Vulnerabilities

In this new whitepaper, you will learn: How to detect and prevent hardware security vulnerabilities in automotive applications with Tortuga Logic’s Radix See how using Radix, as part of your Automotive Security Development Lifecycle, automates and enables a security signoff methodology Click here to read white paper. » read more

Securing SOCs With Esecure HRoT From Silex Insight And Tortuga Logic’s Radix-S

In this new whitepaper, you will learn: How Hardware Roots of Trust (HRoTs) are being used to protect systems with a security foundation The use  of Threat modeling to effectively to verify the eSecure HRoT from Silex Insight in surrounding systems A five-step hardware security validation process that leverages hardware CWEs and Tortuga Logic’s Radix-S to detect and prevent securi... » read more

Measurable Hardware Security With Mitre CWEs

In this new white paper, you will learn how MITRE’s new hardware of Common Weakness Enumerations (CWE) can assist the development team in threat modeling and security validation. Here is a 5-steps CWE validation process to significantly save time, resources, and money on FPGA, ASIC, and SoC design. Click here to continue reading. » read more

Detect And Prevent Security Vulnerabilities In Your Hardware Root Of Trust

Hardware is at the root of the trust chain. Software runs on chipsets in every system meaning that if the hardware itself is not secure the most advanced software-level defenses can still be circumvented. However, it is important to emphasize that analyzing hardware in isolation also does not guarantee system-level security. Composing different parts of a system together can result in vulnerabi... » read more