Author's Latest Posts

Development of Complex Multicore Systems: Tracing Challenges and Concept
By Various Writers - 30 May, 2013 - Comments: 0

This white paper is the first paper of a two-part Mentor Embedded multicore white paper series. In this paper, the challenges software developers face when developing, debugging, and validating software applications for a complex multicore system will be discussed. The paper also highlights some of the questions around hardware resource usage, tracing aids, tracing domains, and concepts for col... » read more

FinFET Technology
By Various Writers - 30 May, 2013 - Comments: 0

This white paper discusses the major challenges with FinFETs and how TSMC has been collaborating with Synopsys, one of their ecosystem partners, to deliver a complete solution. Key elements of this solution include comprehensive FinFET profiling without impact to design tool runtime and proven, verified IP availability. The TSMC 16-nm FinFET solution will ensure mutual customers swiftly move to... » read more

EUV Flare And Proximity Modeling And Model-Based Correction
By Various Writers - 16 May, 2013 - Comments: 0

The introduction of EUV lithography into the semiconductor fabrication process will enable a continuation of Moore’s law below the 22 nm technology node. EUV lithography will, however, introduce new and unwanted sources of patterning distortions which must be accurately modeled and corrected on the reticle. Flare caused by scattered light in the projection optics is expected to result in seve... » read more

FinFET Isolation: Bulk vs. SOI
By Various Writers - 15 May, 2013 - Comments: 1

Terry Hook of IBM recently contributed an article to ASN about FinFET isolation issues on bulk vs. SOI.  It generated immense interest, and created lots of discussion on various LinkedIn groups.  In case you missed it, here it is again. (This article is based on an in-depth presentation Terry gave at the SOI Consortium's Fully-Depleted Tech Workshop, held during VLSI-TSA in Taiwan, April 2... » read more

Smarter Clock Gating
By Various Writers - 09 May, 2013 - Comments: 0

By Ghulam Nurie With the proliferation of mobile devices, power consumption and battery life have emerged as significant concerns during chip design. There are many different techniques used for power optimization, but of all the different techniques, clock gating is the most popular and widely used technique, according to a blind, anonymous survey emailed to several thousand participants worl... » read more

Technologies For Power, Signal, Thermal, And EMI Sign-Off
By Various Writers - 09 May, 2013 - Comments: 0

This paper discusses the challenges associated with designing smaller, faster, and lower cost products. It provides an overview of Apache's power and noise solutions and how these products enable comprehensive chip-package-system convergence flow across multiple design disciplines. To download this white paper, click here. » read more

Using Power Aware IBIS v5.0 Behavioral IO Models To Simulate Simultaneous Switching Noise
By Various Writers - 25 Apr, 2013 - Comments: 0

Typically simultaneous switching noise (SSN) transient simulations require significant CPU and RAM resources. A prominent factor affecting both CPU and RAM resource requirements is the number of MOSFET models included in the post layout extracted IO netlists. By replacing the IO netlists with power aware IBIS v5.0 behavioral models, both the CPU and RAM resource requirements are dramatically re... » read more

Clock Domain Crossing Demystified
By Various Writers - 25 Apr, 2013 - Comments: 0

A look at the second-generation solution for CDC verification. To download this white paper, click here. » read more

Virtual Prototypes: When, Where And How To Use Them
By Various Writers - 25 Apr, 2013 - Comments: 0

An innovation-hungry public and a highly competitive marketplace make for short product cycles, while the sophistication and performance expected of digital devices grows with every new product generation. Heterogeneous multiprocessing, where different cores do specialized work, has become the industry norm inside those devices, radically increasing the amount of software needed, the importance... » read more

Communicate, eXecute And Translate, Oh My!
By Various Writers - 25 Apr, 2013 - Comments: 0

This paper describes a model-driven development approach that leverages modeling efforts to validate functionality and transform high level models into forms that are useful at the next development step. It includes an example of one company's motivations for adopting such an approach, the methodology they adopted, and the value they found in using an MDD flow. To download this white paper,... » read more

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