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Reducing Power In Plasma Display Panels
By Various Writers - 10 Dec, 2009 - Comments: 0

By the EEFocus staff In early 2009 there was a lot of coverage in the media at home and abroad about plasma display panel (PDP) TV sets being banned in the EU. Paul Gray, Director of European TV Research, denied the claim but did mention that they were planning to set minimum energy efficiency standards for flat-panel TVs and set maximum energy consumption limits according to screen sizes. He ... » read more

Verification Of Multi-Clock Designs: The Bigger Picture
By Various Writers - 19 Nov, 2009 - Comments: 0

Yesterday’s SoCs are today’s blocks and sub-chips. The resultant combination of interfaces, protocols and performance objectives regularly results in many clock domains on a single chip. Often, this is further complicated by multiple modes of operation and the associated range of clocking scenarios. This leads to ever increasing numbers of clock interfaces, where data is transferred betw... » read more

The FPGA Alternative
By Various Writers - 31 Oct, 2009 - Comments: 0

By Geoffrey James Until a few years ago, SoC designers focused almost exclusively on ASICs. While it was theoretically possible to create an SoC design for an FPGA, the programmable chips were too bulky and pricey to be useful for much more than prototyping. Today, however, designers are increasingly turning to FPGAs for their SOC targets for production systems. Why the sudden upsurge in So... » read more

SpyGlass Application In An FPGA To ASIC Conversion Flow
By Various Writers - 29 Oct, 2009 - Comments: 0

Mapping from a field programmable gate array (FPGA) to an application specific IC (ASIC) is subject to some limitations. This white paper identifies some of the most common limitations in this mapping process and shows how the use of Atrenta’s GuideWareTM methodologies and SpyGlass® product family help the designer quickly identify and address these limitations. FPGAs are a perfect platfo... » read more

When It Comes To Intellectual Property, Size Matters
By Various Writers - 19 Aug, 2009 - Comments: 0

By Geoffrey James Intellectual property was once seen as the new growth market for EDA. Dozens of firms – large and small – jumped on the IP bandwagon, attracted to the “build once, sell many times” business model. “As late as 2004, the industry was still thinking that as much as 90% of SoCs would be reused IP,” said EDA consultant Gary Smith. The IP segment, however, hasn�... » read more

ESL: Reality, Or A Pigment Of Your Fig Neuton?
By Various Writers - 31 Jul, 2009 - Comments: 0

By Clive "Max" Maxfield One of the questions I am often asked is: "Who's really using ESL tools such as modeling and are there any hiccups in the flow?" Another common question is: "What actually is ESL?" Perhaps we should address the latter question first. To some folks, ESL (electronic system level) means designing at a very high level of abstraction prior to making any hardware-softwar... » read more

Not A Household Name—Yet
By Various Writers - 11 Jun, 2009 - Comments: 0

By Alma Wang Spring and summer are typically the bustling seasons for China’s semiconductor industry. Each day, invitations arrive for members of the media to attend events, contests, and road shows. This year is different, though. It has been eerily quiet. And perhaps even stranger, a local IC design company that rarely makes media appearances announced a top-prize application design com... » read more

Formal Verification 101
By Various Writers - 27 May, 2009 - Comments: 0

By Clive "Max" Maxfield The first time I came into contact with the concepts of a digital hardware description language (HDL) and digital logic simulation, I inherently understood how it all "worked." The idea that the statements in the modeling language acted in a concurrent manner just seemed to make sense. By comparison, trying to wrap my brain around formal verification has always mad... » read more

Making Analog Easier
By Various Writers - 28 Apr, 2009 - Comments: 0

By Clive "Max" Maxfield I'm a digital design engineer by trade. All of those wibbly-wobbly effects that are characteristic of the analog domain make me nervous, and if something makes me nervous I tend to look the other way and hope it will go away. But analog isn’t going anywhere. On the contrary, the increasing amounts of analog/mixed-signal (AMS) functionality that feature in today's Sy... » read more

Trends in System-Level Prototyping
By Various Writers - 27 Mar, 2009 - Comments: 0

By Clive Maxfield One problem with electronics is that certain terms can mean different things, depending on who one is talking to at the time. Even worse, some terms have a tendency to evolve over time. This means that when we are presented with a topic like "Trends in System-Level Prototyping," before leaping headfirst into the fray, it may be a good idea to first define exactly what we mean... » read more

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