Blog Review: Apr. 16

STCO for 2.5D/3D-ICs; AI opportunities, challenges; spaghetti code; fragmented AI regulations; capacitance measurement.

popularity

Siemens’ Tova Levy finds that heterogeneous integration necessitates a shift to a system-level technology co-optimization approach where power, performance, area, cost, and reliability are considered across various components, including silicon, package, interposer, and PCB.

Synopsys’ Greg Sorber listens in as Arm’s Rene Haas and Synopsys’ Sassine Ghazi discuss the opportunity for AI to enable new business models and how increasing complexity will drive design optimization beyond silicon performance and energy efficiency to encompass entire systems.

Cadence’s Vinita Nelson cautions against overly complex spaghetti code when a simple approach can save time, effort, and future headaches.

Arm’s Vince Jesaitis considers how to find a balance between regulatory compliance and technology advancement in a fragmented AI policy landscape, anticipating that regulatory scrutiny will intensify as AI increasingly drives physical systems.

Keysight’s Gabi Duncan stresses the importance of capacitance measurements in the design, troubleshooting, and quality control of semiconductors, radio frequency, power supplies, and other electronic circuits.

Ansys’ Caty Fairclough checks out why the increasingly crowded environment in low Earth orbit poses a significant obstacle for the space industry and how spacecraft operators use simulation to help avoid collisions with space debris.

SEMI’s Kartikey Srivastava explores how emerging technologies are reshaping the workforce, the role of education in preparing future professionals, and strategies for attracting and retaining diverse talent.

Plus, check out the blogs featured in the latest Automotive, Security & Pervasive Computing, Test, Measurement & Analytics, and Low Power-High Performance newsletters:

Technology strategy advisor Geoff Tate digs into the spread of AI and finds that companies will use a mix of GPUs and ASICs, depending on relative performance, power, and availability.

Power architect Barry Pangrle explains why the Unified Power Format is necessary for verifying leading-edge designs, and outlines its main objectives.

Synaptics’ John Weil explains how distillation makes AI efficient, scalable, and deployable across resource-constrained devices.

Synopsys’ Gordon Cooper looks at the benefits of GenAI in applications where real-time processing, privacy, and security are paramount.

Rambus’ Bart Stevens lays out a three-tiered architecture that delivers progressively higher levels of functional integration and security.

Infineon’s Marion Heiss explores how automotive-specific, low-power companion MCUs help address performance, safety, and security challenges.

Cadence’s Reela Samuel digs into the advantages of AI for autonomous vehicle perception, safety, the driving experience, design, and manufacturing.

Imagination’s Eleanor Brash outlines how GPUs support auto SoCs in terms of performance, safety, reliability, multi-tasking, and flexibility.

Siemens’ Jeff Mayer explains the benefits of incorporating testability-related structures, such as core wrapper cells, x-bounding logic, and test points directly into the RTL.

PDF Solutions’ Jonathan Holt looks at new capabilities in process control focused on optimization, connectivity, and security.

Advantest’s Ronald Goerke shows how to extend tester capacity by dynamically redistributing unused vector memory across test processors.

Arm’s Brian Fuller discusses challenges around enterprise adoption of AI, including architectures, scaling, security, sustainability, and the skills gap.

Fraunhofer’s Andy Heinig digs into chiplets and the importance of real-time operating systems and application software.

Rambus’ Lou Ternullo explains how new signal encoding and error correction mechanisms come together to double data bandwidth in PCIe 6.

Cadence’s Mohamed Naeim explores the impact of embedded micro-bumps and wafer-to-wafer hybrid bonding on the thermal behavior of the package stack.

Ansys’ Aliyah Mallak shows why it’s crucial to understand surface and internal dielectric charging in order to reduce the risk of spacecraft anomalies.

Synopsys’ Shruti Bagaria explains the role of foundation IP and how carefully managing the operating conditions of logic cells and embedded memories directly impacts power consumption.



Leave a Reply


(Note: This name will be displayed publicly)