Blog Review: Jan. 22

Cadence’s David Shin provides an overview of the eUSB2V2 specification, which scales up to 4.8Gbps of data rate and provides the flexibility to configure either asymmetrical or symmetrical links depending on the intended application.

Siemens EDA’s Spencer Acain highlights the key role of AI in semiconductor testing, including the addition of analytical AI in DFT tools and how applying machine learning to scan data helps to better analyze failure modes.

Synopsys’ Dana Neustadter and Vincent van der Leest find that data security is becoming an increasingly critical component of automotive safety as vehicles become more connected and automated.

Keysight’s Mike Hodge takes a look at the regulations and standards surrounding automotive cybersecurity and why automated testing that can span complex hardware and software systems is essential.

Ansys’ Kerry Herbert points to co-packaged optics as a major shift in data center technology, as the integration of optical transceivers directly with the chip packaging reduces the distance data must travel as electrical signals are converted to optical signals, drastically reducing latency and power consumption.

Arm’s Paul Black shares what’s new in the latest Arm embedded compiler that aims to reduce cost and risk for safety development.

SEMI’s Ana Bernardo and Sitong He check out how innovation in MEMS and imaging technologies are enabling new applications in markets from automotive to fiber optics for data centers.

Plus, check out the blogs featured in the latest Low Power-High Performance newsletter:

Fraunhofer’s Andy Heinig explains how to reduce risk by distributing the security-critical functionality of a system across different circuits.

Synopsys’ Ron Lowman and Jon Ames show how to tackle the challenges of high-bandwidth, low-latency connectivity and efficient resource management for AI networks.

Rambus’ Tim Messegee explores how different flavors of DRAM, including HBM, LPDDR, and GDDR, each fill a particular AI niche.

Quadric’s Steve Roddy argues that a partitioned, fallback-style architecture can’t work for modern networks because modern CNNs and new transformers are comprised of much more varied ML network operators.

Arm’s Ola Liljedahl looks at best practices for improving throughput and fair access to shared resources in multi-threaded applications.

Cadence’s Veena Parthan dives into thermal solutions for increasing power density and energy costs, such as direct-to-chip cooling and whole-system immersion cooling.

Siemens’ Jeff Wilson outlines ways to meet IR drop mitigation requirements, including power grid enhancement and via insertion, while maintaining design rule compliance and preserving PPA targets.