Blog Review: May 28

Siemens’ Patrick Hope considers how to fully perform post-route signal integrity verification on PCB designs while maintaining the project’s timeline by implementing a progressive verification methodology that enables signal integrity experts to focus on issues that demand their expertise rather than simple errors.

Cadence’s Vanessa Do checks out how CXL addresses the constant demand for flexible memory expansion and memory sharing among devices to meet the need for rapid data access while maintaining coherency within the system.

Synopsys’ Neeraj Paliwal points to the differences between scale-up and scale-out compute clusters and how interconnect IP helps ease the development of bespoke AI silicon that can support multi-trillion-parameter models.

Arm’s Paul Black shows how to run KleidiAI matrix multiplication micro-kernels in a bare-metal environment and performs some basic benchmarking for different C/C++ compilers at different optimization levels to see which one generated faster code.

In a video, Rambus’ Carlos Weissenberg examines trends impacting the desktop and notebook PC client computing market and the new memory interface chipsets for DDR5 client DIMMs and LPCAMM2.

Keysight’s Ben Miller stresses the importance of sampling oscilloscopes in ensuring the reliability of 1.6T optical transceivers, as a failed or unoptimized transceiver could disrupt an entire AI workload.

Ansys’ Olaf Kath explains how model-based systems engineering has grown to replace static documents with digital models that contain everything important about the system, including the requirements, the architecture, and the interfaces between the pieces of the system.

SEMI’s Paul Trio focuses on MEMS manufacturing readiness and cybersecurity with the introduction of a new standard that offers readiness level definitions, processes, and practices for creating MEMS products that meet targeted specification performance, quality, cost, and time-to-market.

And don’t miss the blogs featured in the latest Manufacturing, Packaging & Materials newsletter:

Amkor’s Tsung Ting Lee finds that when the via impedance value cannot be determined, evaluating the signal transmission can provide a viable alternative for maximizing signal integrity in HDFO architectures.

Synopsys’ Anders Blom explains how to quickly screen large amounts of possible materials for specific properties and select promising candidates for deeper analysis using GPU-enhanced atomistic modeling.

Lam Research’s Timothy Yang examines optimal ion beam etch conditions for removing areas of the line and space resist pattern after EUV exposure.

SEMI’s Pushkar Apte shows how the switch to transformer models has increased AI-driven computing demand by a factor of 50 million over 5 years.