Blog Review: May 7

Disaggregation and FuSa; inter-domain leakage; 2nm IP; PCIe optimizations; PyTorch; EU chip supply chain.

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Cadence’s Mayank Bhatnagar examines the challenge of ensuring the functional safety of disaggregated designs and how UCIe can serve as a certified way to connect individual components.

Siemens’ Charlie Olson explores the causes of inter-domain leakage when a DC path is formed between two power rails and how to overcome the limitations of traditional electrical rule checking.

Synopsys’ Hezi Saar looks at the transition from finFET to nanosheet technology and how it will improve performance and power efficiency for mobile devices.

Keysight’s Roberto Piacentini Filho highlights PCIe 5.0 and the clever optimizations that enable it to effectively quadruple the maximum possible data transfer.

Arm’s Cornelius Maroa provides a step-by-step tutorial for how to deploy PyTorch models on Arm edge devices, such as the Raspberry Pi or NVIDIA Jetson Nano, including how to optimize the model to improve inference speed.

Ansys’ Caty Fairclough examines the challenges of lunar and cislunar navigation as the space industry looks to methods of tracking other than traditional ground-based systems, with possibilities including space-spaced relays, passive RF tracking, and a future lunar navigation satellite system.

SEMI’s Cassandra Melvin highlights the growing push to create a European AI chip supply chain, with collaboration across countries needed to mitigate geopolitical risk in key sectors like automotive.

Plus, check out the blogs featured in the latest Automotive, Security & Pervasive Computing newsletter:

Technology strategy advisor Geoff Tate provides highlights from the Optical Fiber Communications Conference 2025.

Synopsys’ Jyotika Athavale digs into auto industry cooperation, AI risks and rewards, security, predictive maintenance, and SLM.

Rambus’ Mike Hamburg and Bart Stevens explain why robust testing is needed to ensure compiler optimizations or micro-architectural effects don’t introduce vulnerabilities.

Infineon’s Jaime Zapata-Amores shows how to balance the accuracy of detailed circuit simulation with the speed of thermal-loss models.

Cadence’s Dharini SubashChandran outlines the benefits of close integration of NAND flash memory and a controller for edge computing devices.

Synaptics’ Neeta Shenoy examines AI native technology, its various applications, and advantages such as enabling devices to learn from user preferences.

Imagination’s Ed Plowman compares GPUs to NPUs and the tradeoffs between maximum hardware performance and having enough flexibility to keep pace with rapid changes in AI.



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