Dueling formats continue to cause problems for big EDA customers, which can be measured in dollars, missed schedules and an endless barrage of complaints.
Please don’t flame me. I am not aiming this at any one group in particular, but I am always struck at the slowness at which standards efforts move, especially when design teams are the ones really feeling the pain.
Case in point: Savita Banerjee, SoC test and verification manager at LSI, told me recently that one of the most important challenges to be solved is a standard way to describe power intent.
“If you are semiconductor vendor, you really can’t force your customers down a certain path and have to align with what they are doing,” she said. “In some cases a customer may choose to use a different power intent format and as far as we’re concerned, we may have aligned on a certain EDA vendor strategy so sometimes we have to bridge the gap there and make sure that those differences don’t introduce any problems down the road. That has added more complexity and something to be aware of.”
Sure it would be nice to think that there is some conversion tool, but what actually happens is that LSI’s engineers must then rewrite a UPF description from its customer’s CPF.
And they are not alone. Here is another recent example from Qualcomm:
I know, I know, you can tell me that these things take time. I completely respect that. All I ask if that you keep the end user in mind. Look at this as a public service message….and get to work!
~Ann Steffora Mutschler
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