A memory interface that offers a simple way to migrate to higher speeds and densities while being power efficient and optimizing on overall system cost.
Rapid advances in microelectronics are driving mega trends across industries, creating a need for new technologies and optimized devices with better performance. With large volumes of data being made available due to the increasing content of electronics in automotive, industrial, smart home and IoT devices, there is a requirement to seamlessly process and render information. Application platforms are also expected to be scalable to cope with the burgeoning demand for better user experience and functionality. In view of this, MCU vendors are developing new-generation MCUs with higher performance and lower power consumption to meet system requirements.
While the MCU/FPGA plays a pivotal role in many embedded sub-system designs, additional capabilities are often required to implement the necessary system functions to optimize performance. One of the most constrained elements in MCU-based designs is the on-chip memory. The memory choice the designer makes for an embedded project drives the overall system capability and performance. Most MCUs are designed with internal memory optimized for certain applications, but this will not support all requirements. Many applications, especially those performing RAM-intensive functions like math algorithms, data buffering, or audio/video applications require large amounts of temporary storage beyond what the on-chip memory of an MCU has to offer.
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