Why the chip-package-system approach will be needed for faster system design convergence.
By Aveek Sarkar
Statistics indicate the increase in sales for mobile handsets in the emerging economies will be from the sale of smart phones. According to a Nielsen report, Brazilian sales of smart phones were up 128% in 2010, compared to 2009.
These emerging economies have traditionally been served by standard cell phones that provided voice and texting needs (Fig. 1), but the consumers in these economies are looking at adopting smart phones that deliver several additional functions and provide a platform to leverage the myriad ‘apps’ that are available. There is anecdotal evidence of farmers in far-flung regions using their smart phones to track the prices of their produce and using it to trade is indicative of this growing trend.
The majority of consumers in these markets are extremely cost sensitive and handset manufacturers must respond accordingly. According to the Nielsen report, the average price of smart phones dropped 2% in the first six months of the year compared to the same period in 2009, and by 5% versus 2008. Consumers also change their phones frequently, looking for new and improved functionality. In the same report, Nielsen mentions that cameras, FM tuners, and MP3 players were the most sought after features. Sales of phones featuring cameras increased 33% in the first half of the year, while those featuring FM tuners jumped 76%. Sales of phones featuring MP3 players grew 74%, while those with GPS products went up 52%.
To meet growing demands, handset manufacturers will have to turn customized designs around quickly, while keeping the component costs down as much as possible. The recent discussions in the press around the introduction of a low cost iPhone with lower component costs are indicative of this direction.
These industry trends present both challenges and opportunities for IC and handset design teams. To meet the application needs, IC designs will need to consist of multiple processor cores based around the ARM architecture and RF circuits, and will need to be both power-efficient and high-performance. The presence of such logic will introduce heightened levels of noise in the circuits, requiring designs with increased immunity to noise that can have a degrading impact on performance and functionality. As ICs move to using lower levels of supply voltage due to power consumption and circuit reliability considerations, the margin available to manage the noise in the circuit continues to shrink.
So, the package that plays a dominant role in the circuit’s power, signal and thermal integrity will need to be designed together with the IC. This will not only enable faster convergence for the IC vendor, but will also allow them to optimize the cost of the components by possibly eliminating extra package capacitors, routing layers, or power/ground pins.
Engineers working on handset designs need to quickly turn their design around to meet critical market windows, and at the lowest cost. If they can verify the board’s power delivery network and signal routing, along with the specifications of other components, they can accelerate their design cycle. However, this methodology requires IC vendors to provide appropriate power and I/O models that can enable a CPS power and signal integrity analysis. This strategic tie-in between IC and handset manufacturers using an integrated CPS co-design environment will enable faster design convergence and higher optimization; resulting in reduction of the overall system cost.
–Aveek Sarkar is vice president of engineering and support at Apache Design Solutions.
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