Chip Industry Week In Review


Analog Devices acquired Flex Logix's technology assets, along with its technical team. Semiconductor global sales increased 23% in Q3 2024 $166B, up almost 11% versus the same period in 2023, according to SIA. Notable regional year-to-year sales in September: Americas up 46%, China up 23%, Europe down 8%. Fig.1: Worldwide Semiconductor Revenues, year-to-year % change. Source: Semiconduc... » read more

Chip Industry Week In Review


Siemens announced plans to acquire Altair Engineering, a provider of industrial simulation and analysis, data science, and high-performance computing (HPC) software, for about $10 billion. Altair's software will become part of Siemens' Xcelerator portfolio and provide a boost to physics-based digital twins. Onto Innovation bought Lumina Instruments, a San Jose, California-based maker of lase... » read more

Startup Funding: Q3 2024


Numerous new companies burst on the scene in the third quarter of 2024, including startups with plans for customizable RISC-V-based IP for applications from microcontrollers to data centers, high-speed data center interconnects, compute-in-memory LLM inference chips, and surveillance camera SoCs. Although it did not report funding, AheadComputing also launched last quarter to develop RISC-V cor... » read more

Chip Industry Week In Review


Imec announced a new automotive chiplet consortium to evaluate which different architectures and packaging technologies are best for automotive applications. Initial members includes Arm, ASE, Cadence, Siemens, Synopsys, Bosch, BMW, Tenstorrent, Valeo, and SiliconAuto. Imec also launched star, a global network bringing together automotive and semiconductor innovators to address technological c... » read more

Will AI Disrupt EDA?


Generative AI has disrupted search, it is transforming the computing landscape, and now it's threatening to disrupt EDA. But despite the buzz and the broad pronouncements of radical changes ahead, it remains unclear where it will have impact and how deep any changes will be. EDA has two primary roles — automation and optimization. Many of the optimization problems are NP hard, which means ... » read more

Chip Industry Week In Review


Early version due to U.S. holiday. The U.S. government announced a new $504 million funding round for 12 Regional Technology and Innovation Hubs (Tech Hubs) for semiconductors, clean energy, biotechnology, AI, quantum computing, and more. Among the recipients: NY SMART I-Corridor Tech Hub (New York): $40 million for semiconductor manufacturing; Headwaters Hub (Montana): $41 million f... » read more

Startup Funding: April 2023


Packaging was a hot spot in April, with one of the largest rounds going to a middle-end-of-line advanced packaging company. A second packaging company also drew significant funding for its focus on wafer-level packaging for CMOS image sensors. Two packaging substrate manufacturers also saw investment. Two photoresist makers also drew sizeable rounds. Both they and the packaging companies are... » read more

Startup Funding: December 2022


The month of December saw six rounds of $100 million or more. The largest, at a massive half-billion dollars, will support manufacturing of 12-inch monocrystalline silicon polished wafers and epitaxial wafers in China. The company is aiming for a production rate of 1 million pieces a month when current expansion is completed. Also in the half-billion club last month is a company making auton... » read more

Week In Review: Design, Low Power


Tools, design, chips Altair, a provider of software and cloud services for CAE, HPC, simulation, and data analysis, acquired Concept Engineering, a provider of automatic schematic generation tools, electronic circuit and wire harness visualization platforms that provide on-the-fly visual rendering, and electronic design debug solutions. “Concept Engineering’s advanced, reactive visualizati... » read more

Week In Review: Design, Low Power


Tools & IP Imperas Software introduced the RISC-V Verification Interface (RVVI). The open standard and methodology can be adapted to any configuration permitted within the RISC-V specifications. RVVI defines interfaces between RTL, reference model, and testbench for RISC-V design verification, with the aim of making RISC-V processor DV reusable. It supports multi-hart, superscalar, and out... » read more

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