Shifting The Design Paradigm To Improve Verification Efficiency

We are in the midst of a verification crisis manifested by a growing gap between verification efficiency and effectiveness. This crisis cannot be solved through improvements in verification methodologies and techniques alone. Indeed, it requires a philosophical change in the way we approach design, with an emphasis on bug prevention. We refer to this fundamental change as design using intent-fo... » read more

Developing Robust Finite State Machines Code With Lint Tools

As design size and complexity grows, the design verification effort grows even more. It takes significant amount of time to thoroughly verify complex control logic of a design, which is the key and the most critical component of design functionality. One of the most common design patterns in the control logic design are finite state machines. They could be designed in different styles, state an... » read more

Physical Lint: Physical Quality Metrics For Your RTL

Why Analyze Physical Metrics at RTL? The quality of the logic structures generated from RTL has a direct impact on the number of design iterations required to close a design. Additionally, the quality of logic structures generated from RTL has a direct impact on design utilization. These trends are illustrated in Figure 1. Essentially, improving the quality of the logic structures in a d... » read more

Billion-Gate Signoff

At last year’s Design and Verification Conference in San Jose, Real Intent had a tutorial session on “Pre-Simulation Verification for RTL Sign-Off.” This was a start of conversation in the industry that we have seen grow through DAC 2013 in Austin, and which is getting louder each day. Verification companies are now talking about crossing the billion-gate threshold and what can be done to... » read more