Understanding Voltage Drop Mechanics

As a fundamental concept of electronic design, voltage drop ranks highly as one to understand well. I particularly appreciate when industry folks come up with creative ways to get the point across.

Jerry Zhao, a product management director at Cadence and I were discussing how to best manage dynamic and static voltage drop, but I first asked him to explain the difference between the two. I particularly appreciated that his response was both technical and down to earth, at the same time.

“Voltage drop, first of all, is a phenomenon that when you deliver the electricity around a distance on the chip, there’s a long distance for the electrons to go. They will create friction against the resistance so by Ohm’s Law, the voltage will drop. It’s very similar to the water supply system in a city: the water that goes to a house is through those large pipes. Each house you can consider as in a semiconductor device would be a cell — that would be a device that will use the electricity; in a house, it would use the water. Water pressure will also drop in a city. Sometimes you feel like your tap water is not very high-pressure if you want to water your backyard. ‘Why is there no water pressure today?’ It’s because the houses ahead of you are closer to the water supply — and they’ve already used up all the water so the water pressure drops or the water voltage drops,” he said.

“Similarly in an integrated circuit, there are power supplies taken from the battery or the wall, and that will supply the current flow — just like water flows — and those wires that deliver to the devices, or the cells in this case, the drop will happen. Depending on the way you look at that, at the timeframe that people talk about the static — which is basically the average or the dynamic which is instantaneously dropping — if you look at your house water pressure for an entire 24 hours, the pressure is probably going to be constant — it will drop a little bit but it averages out. If you look at the voltage drop on a chip, it’s the same thing. People will look at one clock cycle and see what the average is — basically, the average out,” Zhao continued.

“Dynamic, by its name, is basically time-based; it varies if you have a 24 hour day that you’re going to take the measurement of your water pressure on the house — and when you go to water your flowers in the backyard that fluctuates. When everybody’s doing that, it drops more so the dynamic voltage drop can be caused by, for example, your neighbors using a lot and unfortunately he is ahead of you. The same thing happens to the semiconductor IC. That can result in instantaneous voltage drop that could probably, at that point, cause the functions not to be correct. For these reasons, engineering teams need to analyze both behaviors static and dynamic,” he stressed.

And while historically engineering teams have put a lot of focus on static voltage drop because they think it is good enough to go that route, Zhao added that once those teams go to deep submicron nodes like 40nm, 28nm or to 7nm, dynamic voltage drop becomes very, very important. “Analysis for dynamic voltage drop is a way to find out how to make the chip function — in our language it’s called vectors. You use stimulus to stimulate the function. If you talk to the iPhone or are watching a video it’s a totally different function — those are what we call vectors. Based on these vectors the dynamic (or static, in some sense) voltage drop can give you a totally different pattern of use models, and where the consumptions are happening, and where the IR drop is. Because of that, there are a lot of ways to control it, and to make sure that there aren’t large IR drops either static or dynamic voltages.”

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