Startup building AI chip like a brain, a few synapses at a time.
An inventor who made foundational contributions to three key ways we move data through complex systems is developing a new type of neuromorphic chip to accelerate AI applications.
Rather than try to build a computer that looks like a brain, Gautam Kavipurapu and Xceler Systems are building smaller bits that act like synapses. When the design is advanced enough and there are enough of them, they will create complex interconnections among themselves in ways other neuromorphic designs do not.
In the meantime, the building blocks of the Xceler Graph Architecture can help pay their own way as purpose-built accelerators designed for specific jobs. Kavipurapu said modules will function like a “microcontroller on steroids,” providing non-AI apps with some of the depth of cognitive analytics but without the rigidity of their learning or decision-making structures.
“The problem with neuromorphic designs is that you end up with something very far away from what the brain looks like and what it does,” Kavipurapu said. “Synapses aren’t all the same, and the ones that are similar don’t always behave the same. Neurons have different structures, and functions and are classified as such. Neurons in the medulla act differently than neurons in the frontal cortex. For processing a particular object, the processing location in the brain relates to how big an object is, or how far away, so there’s a spatial aspect that we tend to miss.”
That spatial context adds inference that goes beyond computation, Kavipurapu said. The location of a thing changes the way we think about it, and that difference has correlations in where in the brain those thoughts and memories lie.
The linear algebra in graphs and matrices that make up the learning structures of deep neural networks don’t capture that level of complexity. The linear logic of modern computing requires that sequences be made as parallel as possible so they will use machine resources as efficiently as possible. This makes it difficult to get linear processes to address the tangled complexity of things even a small child can picture in his or her head.
“The challenge is to do things in hardware that will dynamically route signals without relying on software,” Kavipurapu said. “You should be able to do object recognition or traversal through the grid without the software’s help using simple pathways and by solving simple maze problems to get from here to there. It’s not geographic modeling, but it does have a spatial aspect to the computation.”
The first modules in the Xceler Graph architecture will be built this year using an FPGA, which provide the flexibility to adapt to specific customer requirements and make it easier to change the architecture in response to customer feedback. Many of those confirmed functions will migrate to ASICs during 2019, but the final version will still have much of the programmability of an FPGA.
Xceler announced a partnership in February with Ectron to design and deliver ruggedized Arduino-compatible units built out with FPGAs, for both general-purpose use and for specific solutions aimed at problems of customers in the industrial IoT market.
Xceler will focus on the industrial IoT market initially, rather than at consumer electronics or other markets, because customer problems in that market are specific enough that there are mass-market solutions. Those customers also recognize the value of a solution to a problem that has a direct, negative effect on their businesses, and are willing to pay for it.
“There are barriers to entry [in that market] because not everyone knows how to address these issues; there are SLAs and liability issues and a timeline to get certified and accepted by the customer. It’s a much more involved process than trying to kick out the next version of a digital assistant or ML app for consumers,” Kavipurapu said. “It’s a strategy that hedges the risk a little and lets us stay a little off the radar.”
Kavipurapu isn’t big on radar. He holds 12 patents and has applications in process for several more, mostly focused on infrastructure to move information to where it needs to be to be acted upon. In 1997, he patented a way to manage packet-based interconnects that predated PCI-Express and Hypertransport, which is still widely used in computer systems. It ws cited as foundational in more than 350 successful patent applications afterward.
In 2001 he led a team at IRIS Holdings that built a PC-based virtual router called the Integrated Routing and Intelligent Switching, which evolved into Network Function Virtualization.
Later he demonstrated a facility for software- and hardware architecture by building a Linux-based virtual router able to run on many machines in a cluster or network, by tying together multi-core Intel NIOS processers, compilers and FPGA chips, the an MPI layer, non-pre-emptive scheduler and custom-designed memory manager. In 2009 his team created a co-processing accelerator for MATLAB/Simulink and C++ code on an x86 machine using a series of multi-FPGA cards and FPGA-DSP cards linked together in a toroid.
Using FPGAs and building co-processors for existing machines gives Kavipurapu flexibility to get the results he’s looking for without being trapped by the architecture. It also lets Xceler take advantage of existing infrastructure by selling innovative compute capabilities that don’t require wholesale replacement of a customer’s current systems.
Regardless of physical architecture, the intent is to create a processor for cognitive applications that is able to cut through the parallel lines of deep-learning matrices and find answers using decision-making processes more sophisticated than the process of elimination.
Xceler also will expand to more sophisticated functional levels by moving into applications that might include autonomic aircraft, self-driving cars and other complex applications in which the number of unpredictable variables and need for real-time response are high, and where contextual self-learning is a better way to approach a problem than preconfigured matrices of rules and preconfigured decisions.
“In the industrial IoT you need systems that can dynamically adapt. If you’ve got a factory floor, you’re always driving toward the greatest efficiency without overstressing your workers or resources,” Kavipurapu said. “You need a different kind of machine for that so you can deal with hard-railed time constraints and situations where you can’t just rely on computational power – like autonomous driving in a place with no real traffic patterns. You’ve got to find your own.”
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