tag: FPGAs

Programmable Chips Evolve For Shifting Needs
By Liz Allan - 23 Dec, 2025 - Comments: 0

ICs and SoCs are utilizing a range of processing elements that allow them to optimize current workloads while hedging their bets for the future. What used to be a simple choice between an ASIC, FPGA, or DSP, has evolved into a mix of processor types and architectures, including varying levels of programmability and customization. Speed is essential, but technology is evolving so quickly that... » read more

FPGAs Find New Workloads In The High-Speed AI Era
By Liz Allan - 25 Nov, 2025 - Comments: 0

FPGAs are finding new applications in the age of artificial intelligence, high-speed wireless communications, medical and life science technology, and in complex chip architectures where they can improve the flow of data. Field-programmable gate arrays (FPGAs) enable designers to reprogram or reconfigure digital logic after the chips have been deployed, which is essential in the AI world, wher... » read more

Raising The Bar In Mission-Critical Verification
By Siemens EDA - 09 Oct, 2025 - Comments: 0

The 2024 Siemens EDA and Wilson Research Group Functional Verification Study provides an in-depth analysis of current trends in FPGA design and verification, with a particular focus on the aerospace and defense (A&D) sector. The study highlights the increasing complexity of FPGA designs driven by factors such as embedded processors, asynchronous clock domains, and stringent security and saf... » read more

Radiation, Temperature, Power Challenges For Chips In Space
By Liz Allan - 07 May, 2025 - Comments: 0

Mission-critical hardware used in space is not supposed to fail at all, because lives may be lost in addition to resources, availability, performance, and budgets. For space applications, failure can occur due to a range of factors, including the weather on the day of launch, human error, environmental conditions, unexpected or unknown hazards and degradation of parts to chemical factors, aging... » read more

Balancing Programmability And Performance In Cars
By Ann Mutschler - 05 Sep, 2024 - Comments: 0

The rate of change in the automotive industry is accelerating with the shift toward software-defined vehicles and ongoing advancements in algorithms and chip architectures. The challenge now is to figure out the best way to prevent rapid obsolescence, improve safety, and keep the cost of these changes to a minimum. Today, updatable automotive hardware is typically achieved through FPGAs, but... » read more

CHERI RISC-V: HW Extension for Conditional Capabilities
By Technical Paper Link - 28 Jul, 2024 - Comments: 0

A technical paper titled “Mon CHÈRI <3 Adapting Capability Hardware Enhanced RISC with Conditional Capabilities” was published by researchers at Ericsson Security Research, Université Libre de Bruxelles, and KU Leuven. Abstract: "Up to 10% of memory-safety vulnerabilities in languages like C and C++ stem from uninitialized variables. This work addresses the prevalence and lack of ade... » read more

Leveraging LLMs To Explain EDA Synthesis Errors And Help Train New Engineers 
By Technical Paper Link - 08 May, 2024 - Comments: 0

A technical paper titled “Explaining EDA synthesis errors with LLMs” was published by researchers at University of New South Wales and University of Calgary. Abstract: "Training new engineers in digital design is a challenge, particularly when it comes to teaching the complex electronic design automation (EDA) tooling used in this domain. Learners will typically deploy designs in the Veri... » read more

New Ways To Optimize GEMM-Based Applications Targeting Two Leading AI-Optimized FPGA Architectures
By Technical Paper Link - 07 May, 2024 - Comments: 0

A technical paper titled “Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs” was published by researchers at The University of Texas at Austin and Arizona State University. Abstract: "FPGAs are a promising platform for accelerating Deep Learning (DL) applications, due to their high performance, low power consumption, and reconfigurability. Recently, the leading FPGA... » read more

Adapting To Evolving IC Requirements
By Ed Sperling - 07 May, 2024 - Comments: 0

As chip designs become increasingly heterogeneous and domain-specific, packing a device with one-size-fits-all chips or chiplets doesn't make sense. The key is rightsizing different components based on real workloads, so they don't waste power when there is too little utilization of logic, and so they don't struggle to complete tasks because they are undersized. Jayson Bethurem, vice president ... » read more

Rethinking Chip Economics
By Ed Sperling - 20 Mar, 2024 - Comments: 0

As process nodes shrink, so does the selection of chips developed at those nodes. Consumers demand more features and functionality, but that carries a high price tag in terms of both complexity and real dollars. In addition, because costs are skyrocketing, there is growing pressure for those chips to remain reliable and up-to-date for longer periods of time. Jayson Bethurem, vice president of m... » read more

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