March 2010 - Semiconductor Engineering

Field Solvers To The Rescue
By Ed Sperling - 25 Mar, 2010 - Comments: 0

By Pallab Chatterjee Field solvers have always been part of the Parasitic Extraction (PEX) world, but due to their long run times and complexity in configuration, their role was relegated to the setup/reference table generation for the pattern based 1-D and 2-D RC extraction tools. That’s about to change. Mentor, in combination with STMicroelectronics, one of it customers, said that at ... » read more

Rounding Up Design Corners
By Ed Sperling - 25 Mar, 2010 - Comments: 0

By Pallab Chatterjee With advanced process development occupying the 32nm to 22nm corridor, production SoC and ASIC designs are being built at the 180nm to 45nm nodes. In these processes, the designer has to contend with cross-wafer variation and non-correlated design corners, as well as multiple operation states. This is referred to as multi-corner multi-mode (MCMM) and variation analysis. ... » read more

Integrated IP Goes Vertical
By Ed Sperling - 25 Mar, 2010 - Comments: 0

By Ed Sperling The consolidation of intellectual property from small developers to large players with integrated IP blocks is accelerating. Large IP companies are now developing integrated suites that are pre-tested for specific vertical markets, and new companies are sprouting up to make it easier to put even broader collections of IP together in meaningful ways. It’s difficult to te... » read more

Emulation 2010
By Ann Mutschler - 25 Mar, 2010 - Comments: 0

By Ann Steffora Mutschler In an industry that was once fraught with patent infringement lawsuits, hostile takeovers and other exciting corporate warfare, the hardware-assisted emulation market has quieted down considerably. That doesn’t mean it has lost its luster, though. It still plays an integral, if not ever-increasing and expanding, role in the verification efforts of most semiconductor... » read more

Slow Adoption for ESL
By Brian Fuller - 25 Mar, 2010 - Comments: 0

By Brian Fuller It’s been more than a decade since electronic system level (ESL) abstraction started to gain traction in EDA. It’s been more than a few years since the industry began to plan for the day when the benefits of embracing C-language approaches to design description and validation would find designers churning out massively complex and profitable designs while sitting in lawn ch... » read more

What Went Wrong At Toyota?
By Ed Sperling - 25 Mar, 2010 - Comments: 0

There’s been a lot of speculation about what caused Toyotas in general, and the Prius in particular, to suddenly accelerate. All across the electronics industry, this is big news because of the amount of electronics that now sits inside an automobile. The most advanced cars have complicated networks of processors, memory, logic, and basically everything that’s already built into the most... » read more

5 Reasons You Can’t Do It Yourself
By Jack Harding - 25 Mar, 2010 - Comments: 0

By Jack Harding With the recent Global Semiconductor Alliance (GSA) Board of Directors vote to create a new category of semiconductor company, the value chain producer’s contribution to the overall industry has been formalized and made permanent. This should come as no surprise. The VCP market segment is closing in on $1 billion in annual sales. The category has evolved from a conceptua... » read more

Insurance, Doctors And ESL
By Jon McDonald - 25 Mar, 2010 - Comments: 0

By Jon McDonald Return on investment is a subject that comes up frequently when people are thinking about adopting higher-level design approaches. After all, we are talking about adding work—we need to model, design, simulate and analyze the system. All of these tasks take time and cost money. So what are we getting in return? Before we can think about the return, we have to identify wha... » read more

Experts At The Table: Low-Power Management And Verification
By Ed Sperling - 19 Mar, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering moderated a panel featuring Bhanu Kapoor, president of Mimasic; John Goodenough, director of design technology at ARM; and Prapanna Tiwari, corporate applications engineer at Synopsys. What follows are excerpts of their presentations, as well as the question-and-answer exchange that followed. Prapanna Tiwari: Traditional techniques like clock-gating an... » read more

Grappling With Graphene
By Brian Fuller - 11 Mar, 2010 - Comments: 0

By Brian Fuller Silicon CMOS is a tough act to follow. The workhorse building block for the world’s electronics has been delivering for system designers for a half century. Despite hand-wringing over its apparent scalability limits, it shows only vague signs of slowing down. For nearly as many years, it seems, the next great material or alternative to silicon CMOS has popped into the indu... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy