July 2010 - Page 3 of 3 - Semiconductor Engineering


Experts At The Table: The Power Problem


Low-Power Engineering sat down to discuss a broad swath of power issues with Vic Kulkarni, general manager and senior vice president of the RTL business unit, Apache Design Solutions; Pete Hardee, solutions marketing manager at Cadence; Bernard Murphy, chief technology officer at Atrenta, and Bhavna Agrawal, manager of circuit design automation at IBM. What follows are excerpts of that conversa... » read more

Power Makes IP Integration More Fun


Remember the good old days at 130nm when it was easy to combine IP blocks on an SoC? All kidding aside, because obviously IP integration has always had its challenges, designers are experiencing new pain as process, voltage and temperature wreak havoc in bringing everything together and making sure it operates correctly, meeting all power requirements. As I discovered, whether IP comes from ... » read more

Behind The Scenes


This year’s DAC should be one of the more interesting shows in several years, although not for the usual reasons. As an industry, we are just emerging from one of the worst downturns in decades. It started in December 2007, and various segments of the overall economy will begin picking up at different times, depending upon whether they’re leading indicators or trailing indicators. Netb... » read more

Newer posts →