November 2013 - Page 6 of 10 - Semiconductor Engineering


Tunnel FETs Emerge In Scaling Race


Traditional CMOS scaling will continue for the foreseeable future, possibly to the 5nm node and perhaps beyond, according to many chipmakers. In fact, chipmakers already are plotting out a path toward the 5nm node, but needless to say, the industry faces a multitude of challenges along the road. Presently, the leading transistor candidates for 5nm are the usual suspects—III-V finFETs; gate... » read more

What’s After 10nm?


For some time, chipmakers have roughly doubled the transistor count at each node, while simultaneously cutting the cost by around 29%. IC scaling, in turn, enables faster and lower cost chips, which ultimately translates into cheaper electronic products with more functions. Consumers have grown accustomed to the benefits of Moore’s Law, but the question is for how much longer? Chips based ... » read more

Momentum Builds For Monolithic 3D ICs


The 2.5D/3D chip market is heating up on several fronts. On one front, stacked-die using through-silicon vias (TSVs) is taking root. In a separate area, Samsung is sampling the world’s first 3D NAND device, with Micron and SK Hynix expected to follow suit. And now, there is another technology generating steam—monolithic 3D integrated circuits. In stacked-die, bare die are connected using... » read more

ARMing Intel


For some time, the industry has kept a close eye on Intel’s fledging foundry business. The question is whether Intel will merely dabble in the foundry business or become a major player. The answer? It’s still too early to tell. Not long ago, Intel entered the foundry business and announced a smattering of small and niche-oriented customers, such as Achronix, Netronome and Tabula.  Micro... » read more

Blog Review: Nov. 13


Synopsys’ Brent Gregory digs into optimal paths—in this case between the bakery, the library and another store. This is the classic traveling salesman equation, but with a large sales staff and lots of stops. Mentor’s Michael Ford points to the gap between supply-chain and shop-floor management solutions. This is yet another example of thinking outside the package—and maybe the enti... » read more

Executive Viewpoint: Atoptech’s Jue-Hsien Chern


What is the difference between skyscrapers and chips? Dr Chern has worked on both and he says it’s all about how you apply margins. Jue-Hsien Chern started his technology career earning a M.S. and B.S. in Engineering from National Taiwan University and majored in structural engineering — bridges, dams, tunnels and high-rise buildings, all of which had to withstand earthquakes. That is a ... » read more

System Bits: Nov. 12


3D Printers When thinking about 3D printers, most people probably think about creating small plastic parts or prototypes. 3D printing now can be used to print lithium-ion microbatteries the size of a grain of sand. The printed microbatteries could supply electricity to tiny devices in fields from medicine to communications, including many that have lingered on lab benches for lack of a batt... » read more

Manufacturing Bits: Nov. 12


Knife-Wielding Robot Cornell University has taught a knife-wielding robot to work in a mock-supermarket checkout line. In doing so, researchers have modified a Baxter robot from Rethink Robotics. In the experiment, the robot coactively learns and makes adjustments while an action is in progress. But when performing tasks at a checkout line, the robot’s problem is to identify the appropria... » read more

Power/Performance Bits: Nov. 12


Back To The Future In the hunt for sources of renewable energy, researchers at ETH Zurich have gone back to a 19th century discovery. Thermoelectric materials have the remarkable property that heating them creates a small electrical current. But enhancing this current to a level compatible with the needs of modern technologies has revealed an extraordinary challenge for scientists of the last ... » read more

Experts At The Table: The Future Of Verification


Semiconductor Engineering sat down to discuss the future of verification with Janick Bergeron, Synopsys fellow; Harry Foster, chief verification scientist at Mentor Graphics; Frank Schirrmeister, group director of product marketing for the Cadence System Development Suite; Prakash Narain, president and CEO of Real Intent; and Yunshan Zhu, vice president of new technologies at Atrenta. What foll... » read more

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