April 2014 - Page 5 of 10 - Semiconductor Engineering


What If EUV Fails?


It’s the worst kept secret in the industry, but extreme ultraviolet (EUV) lithography will likely miss the 10nm node. So, chipmakers will likely extend and use today’s 193nm immersion lithography down to 10nm. This, of course, will require a complex and expensive multiple patterning scheme. Now, chipmakers are formulating their lithography strategies for 7nm and beyond. As it stands now,... » read more

Real Countries Have Fabs


Persistent rumblings about the sale of IBM’s semiconductor unit might have seemed absurd a couple decades ago—before IBM sold off its PC unit to Lenovo and lost the gaming chip business to AMD’s x86 chips—but no one is scoffing at the possibility these days. The reality is that IBM will never reach the volume necessary to be the No. 1 or No. 2 player in its segment. It’s not even i... » read more

Living On The Edge


Looking around the globe at the big foundries these days, many of them are in danger zones—geopolitical, seismological, or areas that have been the incubators for public health disasters in recent years. This is one of the risks of a global supply chain, and it’s one that should cause ulcers for any supply chain management executive. South Korea’s Samsung is within a short missile laun... » read more

Gaps In Metrology Could Impact Yield


For some time, chipmakers have been developing new and complex chip architectures, such as 3D NAND, finFETs and stacked die. But manufacturing these types of chips is no simple task. It requires a robust fab flow to enable new IC designs with good yields. In fact, yield is becoming a more critical part of the flow. Yield is a broad term that means different things to different parts of the ... » read more

IoT Roadblocks: Speed Bumps Or Major Road Closure?


The Internet of Things promises to be a big volume market and continues to grab headlines as companies race forward to prepare for its highly anticipated exponential growth. Huge market size numbers are being tossed around in every article and presentation. But when will the IoT really make an impact and what will it look like? Are we setting ourselves up for a false start? The technology fo... » read more

Getting A Clearer Picture


Scan test diagnosis is an established software-based methodology for localizing defects causing failures in digital semiconductor devices. Using structural test patterns (such as ATPG) and the design description, diagnosis turns failing test cycles into valuable data. Exactly how valuable this data is depends on the quality of the diagnosis results. A result that points to a small group of nets... » read more

Searching For Rare Earths


The semiconductor industry is pre-occupied with several and expensive technologies at once. One the device side, the industry is looking at new chip architectures, such as 3D NAND, finFETs and stacked die. On the manufacturing front, there is 450mm technology, next-generation lithography (NGL) and new materials. And that’s just the tip of the iceberg. Another technology that deserve... » read more

Billions And Billions Invested


Over the years, next-generation [getkc id="80" kc_name="lithography"] (NGL) has suffered various setbacks and delays. But until recently, the industry basically shrugged its shoulders and expressed relatively little anxiety about the NGL delays. After all, optical lithography was doing the job in the fab and NGL would eventually materialize. Today, however, the mood is different. In fact, th... » read more

EU Due Diligence For Conflict Minerals Focuses Upstream, For Now


By Rania Georgoutsakou EU proposed legislation on responsible sourcing of ‘conflict minerals’, published on 5 March 2014, will create a voluntary scheme focusing on upstream suppliers that should help downstream users get the information they need to comply with the U.S. Dodd Frank Act. The EU proposals largely address concerns raised by SEMI and other industry associations, but things cou... » read more

Time To Revisit 2.5D And 3D


Chipmakers are reaching various and challenging inflection points. In logic, many IC makers face a daunting transition from planar transistors at 20nm to finFETs at 14nm. And on another front, the industry is nearing the memory bandwidth wall. So perhaps it’s time to look at new alternatives. In fact, chipmakers are taking a hard look, or re-examining, one alternative—stacked 2.5D/3D chi... » read more

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