ARM’s big.LITTLE Concept

There’s a lot of impressive engineering, but what impact will it have on the industry?


By Barry Pangrle
ARM EVP Simon Segars gave the opening keynote address at last week’s ARM TechCon in Santa Clara, California. The big announcement was the new ARM Cortex-A53 and Cortex-A57 processors that will operate in ARM’s “big.LITTLE” configuration. I wrote a bit about big.LITTLE in my blog last year on Innovation at the Core.

ARM’s big.LITTLE concept is based on using a smaller, more energy-efficient “LITTLE” core for most tasks, and then switching to an instruction-set-compatible “big” core to do the more compute-intensive tasks. ARM’s Cortex-A7 and Cortex-A15 were the first big.LITTLE processors released by ARM, and Simon said we should expect to see production silicon shipping next year with this configuration. Figure 1 below shows how big.LITTLE, when run on a representative workload of some background audio playback mixed with web browsing, gives a system that feels like an A15 in terms of performance but sips energy more like an A7.

Figure 1. big.LITTLE Optimized for Energy and Performance (Source: ARM)

The new A-50 processors are based on the ARMv8 architecture that was announced at last year’s ARM TechCon. Figure 2 below shows some of the enhancements that the new architecture brings to the table, including 64-bit compute capabilities. This architecture was developed to handle where the market is heading for superphones as well as to compete in the server space.

Figure 2. The ARMv8 Architecture supports 32-bit and 64-bit processing. (Source: ARM)

Simon stated that the Cortex A-57 will have 3x the performance of 2012 superphones in 32-bit mode with 5x the power efficiency for tomorrow’s tablets and notebooks. Enterprise features include 64-bit support, enhanced floating point (IEEE 754) and scalability beyond 16 cores and 10x speed-up in encryption through new instructions. It is also claimed to have “PC-class” performance.

The Cortex-A53 is said to deliver the performance of a Cortex-A9, is 40%+ smaller in the same process (including 64-bit support) and consumes half the power. This is quite an accomplishment. Table 1 below shows some comparison data for the Cortex-A53 vs. the earlier Cortex-A5 and A7 processors. For comparison, the Cortex-A57 was said to have > 1250 SPECInt at 1.7GHz.


Table 1. Processor performance comparison (Source: ARM)

Figure 3 below shows how ARM has continued to make architectural improvements that have increased the performance of their designs while simultaneously holding the energy usage in check.
Another new form of support for big.LITTLE also was demonstrated on the floor of the exhibition hall. ARM is in the final stages of readying multiprocessor capability with big.LITTLE MP. This will allow a mix of A7 and A15 cores to run simultaneously based on the current processor workload. There was an FPGA-based demo running on the floor with 3 A7 and 2 A15 cores. There is more info in this white paper, written by one of the ARM TechCon presenters, Peter Greenhalgh.


Brian Jeff also was one of the ARM TechCon presenters last week and he has written a blog on big.LITTLE in 64 bit and on the ARM Cortex-A53. Ian Forsyth has provided more on the ARM Cortex-A57 and Ian Ferguson on the ARM Cortex-A50 for servers, while James Bruce has more info on 64-bit in Mobile. Designing a new architecture that delivers the same performance as the Cortex-A9 that is in use in smartphones today, but does it with half the power at about half the size, plus has 64-bit support, is very impressive. It will be interesting to see the impact that these new Cortex designs will have on the industry.

—Barry Pangrle is an independent power architect in Silicon Valley.


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