Aakash Jani

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Aakash Jani is in charge of technical marketing and brand growth at Movellus.

Author's Latest Posts

Droop And Silent Data Corruption
By Aakash Jani - 25 Jul, 2024 - Comments: 0

By Aakash Jani and Lee Vick Let me set the scene. You are a child psychologist (played by, let’s say, Bruce Willis for illustrative purposes), and you are sitting next to a frightened kid. He turns to you and whispers, “I see dead bits.” Okay, I grant you that’s not exactly the quote, but data center operators are seeing transient errors at an alarming rate, and at scale. These error... » read more

Balancing IR Drop Unpredictability With Post-Silicon Flexibility
By Aakash Jani - 24 Aug, 2023 - Comments: 0

The concept of IR drop in silicon chips has always been a crucial aspect of chip design. However, recent technological trends and the emergence of new challenges, such as voltage-sensitive paths, have introduced a degree of uncertainty in predicting and effectively managing IR drop. These uncertainties are driving the need for a more flexible approach in mitigating on-die voltage droop. Increa... » read more

Mitigating Voltage Droop
By Aakash Jani - 13 Jun, 2023 - Comments: 0

Voltage droop, also known as IR drop, is a phenomenon that occurs when the current in the power delivery network abruptly changes due to workload fluctuations. This can lead to supply voltage drops across system-on-chips (SoCs) which can cause severe performance degradation, limit their energy efficiency, and in extreme cases can cause catastrophic timing failures. To avoid these issues, conven... » read more

Cutting Clock Costs On The Bleeding Edge Of Process Nodes
By Aakash Jani - 01 Aug, 2022 - Comments: 0

In a recent study done by McKinsey and IDC, we see that physical design and verification costs are increasing exponentially with shrinking transistor sizes. As figure 1 shows, physical design (PD) and pre-silicon verification costs are doubling each process leap. As companies leap from node to leading node, a natural question arises. Why is it becoming harder and more expensive to tapeout a chi... » read more

Adaptive Clocking: Minding Your P-States And C-States
By Aakash Jani - 23 Jun, 2022 - Comments: 0

Larger processor arrays are here to stay for AI and cloud applications. For example, Ampere offers a 128-core behemoth for hyperscalers (mainly Oracle), while Esperanto integrates almost 10x more cores for AI workloads. However, power management becomes increasingly important with these arrays, and system designers need to balance dynamic power with system latency. As we march year over year, t... » read more

Enabling Big Chip AI Solutions Through Intelligent Clock Networks
By Aakash Jani - 26 May, 2022 - Comments: 0

Data centers, autonomous vehicles, and computer vision applications are pushing the limits of scalable AI compute. Data center chips face multi-trillion parameter models that continue growing every year. ADAS systems require flexibility and processing power for new model types, such as vision transformers. Edge AI solutions demand tight power budgets and the ability to process multiple models i... » read more

Low Earth Orbit Satellites For More Reliable Internet
By Aakash Jani - 28 Apr, 2022 - Comments: 0

Working from home may have reduced the stress of commuting, but it put a heavy strain on the power grid and ate into energy reserves. Still, with utilities such as electricity and water, it's possible to buy or borrow from adjacent grids or territories. The same cannot be said for internet service providers. They cannot just borrow from another service provider. Instead, their customers woul... » read more

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