Author's Latest Posts


DRAM Test And Inspection Just Gets Tougher


DRAM manufacturers continue to demand cost-effective solutions for screening and process improvement amid growing concerns over defects and process variability, but meeting that demand is becoming much more difficult with the rollout of faster interfaces and multi-chip packages. DRAM plays a key role in a wide variety of electronic devices, from phones and PCs to ECUs in cars and servers ins... » read more

Isolating Critical Data In Failure Analysis


Experts at the Table: Semiconductor Engineering sat down to discuss traceability and the lack of data needed to perform root cause analysis with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; Mike McIntyre, director of product management in the Enterprise Business Unit at Onto Innovation; Kamran Hakim, ASIC reliability engineer at Teradyne... » read more

Streamlining Failure Analysis Of Chips


Experts at the Table: Semiconductor Engineering sat down to discuss how increasing complexity in semiconductor and packaging technology is driving shifts in failure analysis methods, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; Mike McIntyre, director of product management in the Enterprise Business Unit at Onto Innovation; Kamran Hak... » read more

Data, System Reliability, and Privacy


Experts at the Table: Semiconductor Engineering sat down to discuss changes in test that address tracing device quality throughout a product’s lifetime, and over-arching concerns about data ownership and privacy, with Tom Katsioulas, CEO at Archon Design Solutions and U.S. Department of Commerce IoT advisory board member; Ming Zhang, vice president of R&D Acceleration at PDF Solutions; a... » read more

When And Where To Implement AI/ML In Fabs


Deciphering complex interactions between variables is where machine learning and deep learning shine, but figuring out exactly how ML-based systems will be most useful is the job of engineers. The challenge is in pairing their domain expertise with available ML tools to maximize the value of both. This depends on sufficient quantities of good data, highly optimized algorithms, and proper tra... » read more

Improving Reliability In Chips


Semiconductor Engineering sat down to discuss changes in test that address tracing device quality throughout a product’s lifetime with Tom Katsioulas, CEO at Archon Design Solutions and U.S. Department of Commerce IoT advisory board member; Ming Zhang, vice president of R&D Acceleration at PDF Solutions; and Uzi Baruch, chief strategy officer at proteanTecs. What follows are excerpts of t... » read more

Securing Chip Manufacturing Against Growing Cyber Threats


Semiconductor manufacturers are wrestling with how to secure a highly specialized and diverse global supply chain, particularly as the value of their IP and their dependence upon software increases — along with the sophistication and resources of the attackers. Where methodologies and standards do exist for security, they often are confusing, cumbersome, and incomplete. There are plenty of... » read more

SiC Growth For EVs Is Stressing Manufacturing


The electrification of vehicles is fueling demand for silicon carbide power ICs, but it also is creating challenges in finding and identifying defects in those chips. Coinciding with this is a growing awareness about just how immature SiC technology is and how much work still needs to be done — and how quickly that has to happen. Automakers are pushing heavily into electric vehicles, and t... » read more

Goals of Going Green


The chip industry is stepping up efforts to be seen as environmentally friendly, driven by growing pressure from customers and government regulations. Some manufacturers have been addressing sustainability challenges for more than a decade, but they are becoming more aggressive in their efforts, while others are joining them. A review of sustainability reports across the semiconductor indust... » read more

Pinpointing Timing Delays in Complex SoCs


Telemetry circuits are becoming a necessity in complex heterogeneous chips and packages to show how these devices are behaving post-production, but fusing together relevant data to identify the sources of problems adds its own set of challenges. In the past, engineering teams could build margin into chips to offset any type of variation. But at advanced nodes and in advanced packages, tolera... » read more

← Older posts Newer posts →