Author's Latest Posts

CodaCache: Helping to Break the Memory Wall
By Arteris - 04 Aug, 2020 - Comments: 0

As artificial intelligence (AI) and autonomous vehicle systems have grown in complexity, system performance needs have begun to conflict with latency and power consumption requirements. This dilemma is forcing semiconductor engineers to re-architect their system-on-chip (SoC) designs to provide more scalable levels of performance, flexibility, efficiency, and integration. From the edge to data ... » read more

Power Dissipation Of The Network-On-Chip In A System-on-Chip For MPEG-4 Video Encoding
By Arteris - 04 Dec, 2019 - Comments: 0

An oldie but a goodie: Explains power benefits of NoC technology by characterizing a multi-processor system-on-chip (MPSoC) for MPEG4, AVC/H.264 encoding. Explains NoC power model used to analyze power consumption and dissipation. Includes: Description of multi-processor system-on-chip (MPSoC) for Multi-Processor System-on-Chip (MPSoC) for MPEG4, AVC/H.264 encoding Explanation of N... » read more

Re-Architecting SoCs For The AI Era
By Arteris - 04 Sep, 2019 - Comments: 0

The growth of artificial intelligence (AI) demands that semiconductor companies re-architect their system on chip (SoC) designs to provide more scalable levels of performance, flexibility, efficiency, and integration. From the edge to data centers, AI applications require a rethink of memory structures, the numbers and types of heterogeneous processors and hardware accelerators, and careful con... » read more

Application Driven Network On Chip Architecture Exploration And Refinement For A Complex SoC
By Arteris - 01 Jul, 2019 - Comments: 0

This white paper summarizes the various features a NoC is required to implement to be integrated in modern SoCs, describes a top-down approach based on the progressive refinement of the NoC description from its functional specification (Sect. 4) to its verification (Sect. 8), and it uses use cases to show how to identify bottlenecks and converge towards the NoC implementation. To read more, ... » read more

Using Synopsys Z01X To Accelerate The Fault Injection Campaign Of A Fully Configurable IP
By Arteris - 05 Jun, 2019 - Comments: 0

By Arteris IP Alexis Boutillier, Corporate Application Manager, Safety Manager, and Mohan Krishnareddy, Solution Engineer, at the Synopsys Users Group (SNUG), March 2018, Santa Clara, CA. Principles and real-world practices of ISO 26262 for semiconductor design teams. After providing an overview of how functional safety affects management, development, and supporting processes, the paper exp... » read more

Fundamentals Of Semiconductor ISO 26262 Certification: People, Process And Product
By Arteris - 03 Apr, 2019 - Comments: 0

Written by an ISO 26262 working group member who contributed to the new ISO 26262:2018 Part 11, this paper dispels myths about ISO 26262 certification and seeks to enhance the reader’s knowledge regarding all aspects of the ISO 26262 standard. Provides information on employee training and certification courses, functional safety consulting services, and accredited certification by exida, T... » read more

Fundamentals of Semiconductor ISO 26262 Certification: People, Process and Product
By Arteris - 09 Jan, 2019 - Comments: 0

Written by Kurt Shuler, VP of Marketing at Arteris IP Developers of automotive semiconductor devices and electronic systems beware: There may be some vendors who claim their products meet the ISO 26262 safety standard requirements for integration into the production of passenger vehicles without fully understanding the nature of the challenge. These claims might be superficial if they fail... » read more

How To Efficiently Achieve ASIL-D Compliance Using NoC Technology
By Arteris - 05 Sep, 2018 - Comments: 0

Increasing layers of electronics and software are being added to vehicles, from infotainment to engine, brakes, and various sensors for ADAS and autonomous driving. To address the increasing use of electronics in automobiles, the ISO 26262 Functional Safety for Road Vehicles standard was developed. This standard is intended to ensure that the electronics are designed to specified levels in o... » read more

Automotive SoC Maker Saves Time, Enhances Product QoS For Advanced Real-Time Video Image Recognition
By Arteris - 26 Apr, 2017 - Comments: 0

Automated driver assistance systems (ADAS) used to be expensive until Mobileye figured out how to use inexpensive cameras with advanced visual processing to help make cars autonomous. In this 4-page paper, created with the participation of Mobileye, you will learn how the world's #1 vision-based ADAS company uses Arteris FlexNoC interconnect IP to address demanding high bandwidth and low-latenc... » read more

Easing Heterogeneous Cache Coherent SoC Design Using Arteris’ Ncore Interconnect IP
By Arteris - 24 Aug, 2016 - Comments: 0

Heterogeneous processing has become a hallmark of mobile SoCs, but designing cache coherency across these diverse processing elements can be difficult. Standard on-chip interfaces and network-on-a-chip (NoC) technology are the first step, giving architects IP to efficiently connect compute processing elements as different as CPUs, GPUs, and DSPs. Hardware IP to enable coherent communication bet... » read more

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