Author's Latest Posts


FeFETs Bring Promise And Challenges


Ferroelectric FETs (FeFETs) and memory (FeRAM) are generating high levels of interest in the research community. Based on a physical mechanism that hasn’t yet been commercially exploited, they join the other interesting new physics ideas that are in various stages of commercialization. “FeRAM is very promising, but it's like all promising memory technologies — it takes a while to get b... » read more

DRAM’s Persistent Threat To Chip Security


A well-known DRAM vulnerability called "rowhammer," which allows an assailant to disrupt or take control of a system, continues to haunt the chip industry. Solutions have been tried, and new ones are being proposed, but the potential for a major attack persists. First discovered some five years ago, most of the efforts to eliminate the "rowhammer" threat have done little more than mitigate t... » read more

Automotive Test Moves In-System


With the electrification of automobiles, it’s not enough to test the new electronics thoroughly at the end of the manufacturing process. Safety standards now require that tests be performed live, in the field, with contingency plans should a test fail. “We see clear demand from the automotive semiconductor supply chain for design functionality specifically aimed at in-system monitoring,�... » read more

Edge-Inference Architectures Proliferate


First part of two parts. The second part will dive into basic architectural characteristics. The last year has seen a vast array of announcements of new machine-learning (ML) architectures for edge inference. Unburdened by the need to support training, but tasked with low latency, the devices exhibit extremely varied approaches to ML inference. “Architecture is changing both in the comp... » read more

More Data, More Memory-Scaling Problems


Memories of all types are facing pressures as demands grow for greater capacity, lower cost, faster speeds, and lower power to handle the onslaught of new data being generated daily. Whether it's well-established memory types or novel approaches, continued work is required to keep scaling moving forward as our need for memory grows at an accelerating pace. “Data is the new economy of this ... » read more

Testing Silicon Photonics In Production


As silicon photonics costs come down, the technology is being worked into new applications, from connectivity to AI. But full commercial production requires testing those photonic circuits before shipping them. Photonics testing is only getting started. Volume production is still not happening, and test equipment and techniques are still being developed. What exists today is a blend of exist... » read more

Managing Device Certificates Is Becoming Harder


As the number of devices connected to the Internet balloons, certificate management is becoming more complex, more essential, and significantly harder to keep track of. There are many different certificates for many different purposes, not to mention certificates that are unique to each device. And the lifetimes of those certificates may vary, making it even tougher to keep operating certifi... » read more

Electronics Supply-Chain Trust Standards Emerge


Creative new ideas for electronics supply-chain trust are in rich supply, whether securing identity, protecting logistics, or establishing provenance. But underlying these efforts are wide-ranging standards in development from a broad set of organizations. Today, no one-stop-shop for supply-chain standards exists. Instead, there is huge fragmentation. It can be difficult to identify all of t... » read more

Waking And Sleeping Create Current Transients


Silicon power-saving techniques are helping to reduce the power required by data centers and other high-intensity computing environments, but they’ve also added a significant challenge for design teams. As islands on high-powered chips go to sleep and wake up, the current requirements change quickly. This happens in a few microseconds, at most. The rapid change of loading creates a challen... » read more

Digital Test Bulks Up – Or Down


Large digital integrated circuits are becoming harder to test in a time- and cost-efficient manner. AI chips, in particular, have tiled architectures that are putting pressure on older testing strategies due to the volume of test vectors required. In some cases, these chips are so large that they exceed reticle size, requiring them to be stitched together. New testing efficiencies are needed... » read more

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