Author's Latest Posts

Machine Learning-Driven Full-Flow Chip Design Automation
By Cadence - 24 Aug, 2022 - Comments: 0

To enable the semiconductor industry to continue growing, the chip design process must become more efficient. With the availability of massive, cloud-enabled, distributed computing and advancements in machine learning computer science, the next chip design automation revolution is now possible. The Cadence® Cerebrus™ Intelligent Chip Explorer utilizes both of these technologies, based o... » read more

Fidelity Pointwise Grid Cell Remediation Method For Overset Meshes
By Cadence - 10 Aug, 2022 - Comments: 0

In computational fluid dynamics, (CFD) overset meshing is highly appreciated in turbomachinery for moving body applications. Moreover, significant efforts have been made to improve the overset flow solver capability, but only limited developments have been made to what is quickly becoming a bottleneck in the simulation process — the creation of the overset composite grid. Cadence Fidelity Poi... » read more

Microstrip Antenna Design
By Cadence - 27 Jul, 2022 - Comments: 0

A significant performance element in communication and radar systems, as well as wireless devices, is the antenna, which may be defined as a transducer between a guided electromagnetic (EM) wave propagating along a transmission line, and an EM wave propagating in an unbounded medium (usually free space) or vice-versa.1 The antenna is required to transmit or receive EM energy with directional an... » read more

Thermally Optimizing A High-Power PCB
By Cadence - 18 Jul, 2022 - Comments: 0

The growth of battery-powered applications is presenting new challenges for designers of electronic motor-driven solutions. Targeting higher performance and efficiency, the power stages of these products must manage high currents while meeting strict power dissipation and size requirements. This white paper illustrates a thermally aware workflow with the Cadence® Celsius™ Thermal Solver... » read more

Closing The Loop: Meeting High-Frequency Power Demands With Decoupling Capacitors
By Cadence - 06 Jul, 2022 - Comments: 0

The inability to supply adequate power in time can result in intermittent board failure and hours troubleshooting in the lab. Even an IC with ample current supply can experience "power shortage" if the energy needed to transmit the data bitstream isn't available in time. Click here to read more. » read more

Overcoming Signal, Power, And Thermal Challenges Implementing GDDR6 Interfaces
By Cadence - 22 Jun, 2022 - Comments: 0

Graphics processing units (GPUs) and graphics double data rate (GDDR) memory interfaces are essential to graphics cards, game consoles, high-performance computing (HPC), and machine learning applications. These interfaces enable data transfer speeds of over 665GB per second today and will continue to support well over a terabyte per second (TBps) in next-generation GDDR interfaces. Signal integ... » read more

EDA Software Design Flow Considerations For The RF/Microwave Module Designer
By Cadence - 25 May, 2022 - Comments: 0

Miniaturization of consumer products, aerospace and defense systems, medical devices, and LED arrays has spawned the development of a technology known as the multi-chip module (MCM), which combines multiple integrated circuits (ICs), semiconductor die, and other discrete components within a unifying substrate for use as a single component. This white paper outlines the steps for implementing an... » read more

Data Management Position: An Automated Approach to Intelligent PCB Design Data Management
By Cadence - 04 May, 2022 - Comments: 0

The design cycle of electronic devices produces vast amounts of data. From a top-level view, this data can be broken down into basic blocks, including software, circuit board design, mechanical design, and others. These blocks contain extensive and complex information, including the types and amounts of individual data and information files, as well as their hierarchy structure. This data and i... » read more

Advances In EM Analysis And Design Flows For RF System Development
By Cadence - 27 Apr, 2022 - Comments: 0

With the move toward higher frequencies and component densities, RF/mixed signal PCB systems and heterogeneous system-in-package (SiP) technologies are increasingly susceptible to delayed product development turnaround times that threaten delivery schedules. These delays often occur late in development during integration when components that met the design specifications fail to achieve the req... » read more

Interop Shift Left: Using Pre-Silicon Simulation for Emerging Standards
By Cadence - 13 Apr, 2022 - Comments: 0

By Martin James, Gary Dick, and Arif Khan, Cadence with Suhas Pai and Brian Rea, Intel The Compute Express Link™ (CXL™) 2.0 specification, released in 2020, accompanies the latest PCI Express (PCIe) 5.0 specification to provide a path to high-bandwidth, cache-coherent, low-latency transport for many high-bandwidth applications such as artificial intelligence, machine learning, ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy