How Switching Activity Impacts A Design’s Power And Reliability

By Chris Ortiz - 14 May, 2015 - Comments: 0

Electronics continue to gain presence in both familiar and unfamiliar areas of our lives. Electronics is a common thread among the cars we drive, the computers we use, the mobile phones and wearable devices that we rely on. We appreciate the information and convenience that Fitbits and other products such as coffee makers, credit cards and building security cards provide us. And we are beginni... » read more

Package Modeling Needs For A Robust IC Power Integrity Sign-Off

By Chris Ortiz - 12 Mar, 2015 - Comments: 0

Progress in IC technology has allowed chip designers to pack more functionality and continually make better use of silicon area. This trend, coupled with the need to maintain low power using techniques such as voltage islands and power and clock gating, has caused the power consumption to vary across the chip and over time. This has introduced considerable amount of transient current peaks in t... » read more

Need For Unified Chip-Package Analysis

By Chris Ortiz - 12 Sep, 2013 - Comments: 0

For anyone involved in the system-on-chip (SoC) design cycle over the past few years, it is easy to see that the functionality of the chip has become more diverse with the addition of new features and duplication of main functions to drive higher throughput. This trend coupled with the need to maintain low power through various techniques such as voltage islands and power and clock gating have ... » read more