Author's Latest Posts


EDA Gaps At The Leading Edge


Semiconductor Engineering sat down to discuss why new approaches are required for heterogeneous designs, with Bari Biswas, senior vice president for the Silicon Realization Group at Synopsys; John Lee, general manager and vice president of the Ansys Semiconductor business unit; Michael Jackson, corporate vice president for R&D at Cadence; Prashant Varshney, head of product for Microsoft Azu... » read more

Week In Review: Manufacturing, Test


Node scaling wars are revving up, although much of the action is happening where most people can't see it — inside of research labs. This is difficult stuff, which makes delivery dates difficult to pinpoint, and no one wants to give away their competitive position or commit to a timeline they can't keep. Billions of dollars of leading-edge research — funded by pure-play foundry TSMC, IDM... » read more

Variation Making Trouble In Advanced Packages


Variation is becoming increasingly problematic as chip designs become more heterogeneous and targeted by application, making it difficult to identify the root cause of problems or predict what can go wrong and when. Concerns about variation traditionally have been confined to the most advanced nodes, where transistor density is highest and where manufacturing processes are still being fine-t... » read more

Co-Packaged Optics In The Data Center


Just because faster Ethernet is added to the data center doesn’t mean existing hardware can utilize it efficiently. Scott Durrant, strategic marketing manager at Synopsys, talks with Semiconductor Engineering about the rapid rollout of faster Ethernet rates, problems in moving data to the front module of the switch and how much energy is required, and what optical technology can bring to the ... » read more

Chip Substitutions Raising Security Concerns


Substituting chips is becoming more common in the electronics industry as shortages drag on, allowing systems vendors to continue selling everything from cars to manufacturing equipment and printer cartridges without waiting for a commoditized part. But substitutions aren't always an even swap, and they increase security risks in ways that may take years to show up or fully understand. So fa... » read more

Who Benefits From Chiplets, And When


Experts at the Table: Semiconductor Engineering sat down to discuss new packaging approaches and integration issues with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front of a... » read more

Repositioning For A Changing IC Market


Sailesh Chittipeddi, executive vice president at Renesas, sat down with Semiconductor Engineering to talk about how changes in end markets are shifting demand for technology. What follows are excerpts of that conversation. SE: Renesas has acquired a number of companies over the past several years. What's the goal? Chittipeddi: The goal very simply is to create an industry leading solutio... » read more

Deep Learning In Industrial Inspection


Deep learning is at the upper end of AI complexity, sifting through more data to achieve more accurate results. Charlie Zhu, vice president of R&D at CyberOptics, talks about how DL can be utilized with inspection to identify defects in chips that are not discernible by traditional computer vision algorithms, classifying multiple objects simultaneously from multiple angles and taking into accou... » read more

Protecting ICs Against Specific Threats


Identifying potential vulnerabilities and attack vectors is a first step in addressing them. Anders Nordstrom, security application engineer at Tortuga Logic, talks with Semiconductor Engineering about the growing risk of remote hardware attacks, what to do when a chip is hacked, and where to find the most common weaknesses for chips. » read more

Bridging IC Design, Manufacturing, And In-Field Reliability


Experts at the Table: Semiconductor Engineering sat down to talk about silicon lifecycle management and how that can potentially glue together design, manufacturing, and devices in the field, with Prashant Goteti, principal engineer at Intel; Rob Aitken, R&D fellow at Arm; Zoe Conroy, principal hardware engineer at Cisco; Subhasish Mitra, professor of electrical engineering and computer sci... » read more

← Older posts Newer posts →