Author's Latest Posts


High-Speed SerDes At 7/5nm


Manmeet Walia, senior product marketing manager at Synopsys, talks with Semiconductor Engineering about how to optimize PHYs for integration on all four corners of an SoC, as well as the PPA implications of moving large amounts of data across and around a chip. » read more

An Eye For An AI


AI comes in multiple forms and flavors. The challenge is choosing the right one for the right purpose, and recognizing that just because AI can be applied to a particular process or problem doesn't mean it should be. While AI has been billed as a ideal solution for just about every problem, there are three primary requirements for a successful application. First, there needs to be sufficient q... » read more

What Will The Next-Gen Verification Flow Look Like?


Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; and Nasr Ullah, senior director of performance architecture at SiFive. What follows are exc... » read more

Ensuring HBM Reliability


Igor Elkanovich, CTO of GUC, and Evelyn Landman, CTO of proteanTecs, talk with Semiconductor Engineering about difficulties that crop up in advanced packaging, what’s redundant and what is not when using high-bandwidth memory, and how continuous in-circuit monitoring can identify potential problems before they happen. » read more

The Chemistry Of Semiconductors


At each new process node, the chemistry of chip manufacturing has become much more complex than at previous nodes. But at 5nm and below, it's going to get orders of magnitude more complex. For the first few decades, the chemistry of chips was largely shielded from view for most of the industry. Caustic gases were relatively well understood because they are a potential health hazard, but the ... » read more

Cleaning Data For Final Test


John O’Donnell, CEO of yieldHUB, talks about why data integrity is so critical for final test, what can cause it to be less-than-perfect, what’s needed to improve the quality of that data, and how that impacts the overall yield in a fab. » read more

Rising Packaging Complexity


Synopsys’ Rita Horner looks at the design side of advanced packaging, including how tools are chosen today, what considerations are needed for integrating IP while maintaining low latency and low power, why this is more complex in some ways than even the most advanced planar chip designs, and what’s still missing from the tool flow. » read more

Choosing Between CCIX And CXL


Semiconductor Engineering sat down to the discuss the pros and cons of the Compute Express Link (CXL) and the Cache Coherent Interconnect for Accelerators (CCIX) with Kurt Shuler, vice president of marketing at Arteris IP; Richard Solomon, technical marketing manager for PCI Express controller IP at Synopsys; and Jitendra Mohan, CEO of Astera Labs. What follows are excerpts of that conversati... » read more

The Other Storage Race


Tesla's push to extend the life of lithium ion batteries used in cars by repurposing them for less-intensive applications could have a major impact on the business model for a whole slew of other markets. As anyone with a smartphone knows, batteries degrade over time. A new phone holds a charge longer than one that has been in use for several years, but in the case of a smartphone that's gen... » read more

Sensors, Data And Machine Learning


Strategies for building reliability into chips and systems are beginning to shift as more sensors are added into these devices and machine learning is applied to that data. In the past, system monitoring relied heavily on MEMS devices for things like acceleration, temperature and positioning (gyroscopes). While those devices are still important, in the past couple years there has been an exp... » read more

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