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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Blog Review: Aug. 17
By Jesse Allen - 17 Aug, 2016 - Comments: 0

Mentor's Andrew Macleod listens in on the most pressing electrical engineering and embedded software challenges in the automotive industry today, in an IESF presentation by Paul Johnston. Many flash memory protocols have appeared, and Synopsys' Rahul Ramesh Chaudhari delves into ONFi in particular. Cadence's Paul McLellan digs into the challenges facing the development and roll out of 5G.... » read more

Power/Performance Bits: Aug. 16
By Jesse Allen - 16 Aug, 2016 - Comments: 0

Dissolving batteries Researchers at Iowa State University developed a self-destructing lithium-ion battery capable of delivering 2.5 volts and dissolving or dissipating in 30 minutes when dropped in water. The battery can power a desktop calculator for about 15 minutes. Making such devices possible is the goal of a relatively new field of study called "transient electronics." These transi... » read more

The Week In Review: Design
By Jesse Allen - 12 Aug, 2016 - Comments: 0

IP Avery Design Systems released NVM Express over Fabrics 1.0 and NVM Express 1.2.1 extensions to its NVM-Xactor verification IP, enabling verification of both NVMe over PCIe and NVMe over Fabrics designs. Arastu Systems uncorked an optimized DDR3/4 DRAM Controller Core, which works with DFI 3.1 compatible PHY. The core supports all key DDR3/DDR4 features and additional features like Erro... » read more

Blog Review: Aug. 10
By Jesse Allen - 10 Aug, 2016 - Comments: 0

Is the end near for FinFETs? Applied's Mike Chudzik digs into the impact of rising parasitic resistance and parasitic capacitance and the challenges of scaling to 5nm. Cadence's Paul McLellan checks out the method UC Berkeley is using to build RISC-V processors. Mentor's Colin Walls warns that in C even the simplest things, like the declaration of variables, have pitfalls for the unwary. ... » read more

Power/Performance Bits: Aug. 9
By Jesse Allen - 09 Aug, 2016 - Comments: 0

Phase-change memory Researchers at Stanford are working on phase-change memory technology, which could deliver the best of volatile and non-volatile memory. Phase-change materials can exist in two different atomic structures, each of which has a different electronic state. A crystalline, or ordered, atomic structure, permits the flow of electrons, while an amorphous, or disordered, struct... » read more

The Week In Review: Design
By Jesse Allen - 05 Aug, 2016 - Comments: 0

Tools ProPlus Design Solutions unveiled its 9812DX wafer-level 1/f noise characterization system, an enhanced version of its de facto standard 9812D. It includes a more than 10X increase in system resolution, as well as a speedup boost three-to-five times faster than previous systems, higher voltage support up to 200V, and lower current support down to 0.1nA. It also adds a wider range of me... » read more

Blog Review: Aug. 3
By Jesse Allen - 03 Aug, 2016 - Comments: 0

Mentor's Andrew Macleod presents three hours of highlights from this year's IESF automotive conference in Detroit with topics from making cars more affordable to reaching an efficiency of 54.5 MPG. Cadence's Paul McLellan checks out the state of the smartphone landscape now that consolidation in the market seems to be complete at the Linley Mobile Conference. Synopsys' Eric Huang consider... » read more

Power/Performance Bits: Aug. 2
By Jesse Allen - 02 Aug, 2016 - Comments: 0

From sun to hydrocarbon fuel Researchers at the University of Illinois at Chicago have engineered a solar cell that cheaply and efficiently converts atmospheric carbon dioxide directly into usable hydrocarbon fuel, using only sunlight for energy. Unlike conventional solar cells, which convert sunlight into electricity that must be stored in heavy batteries, the new device converts atmosph... » read more

The Week In Review: Design
By Jesse Allen - 29 Jul, 2016 - Comments: 0

IP Rambus debuted 3200 Mbps DDR4 PHY, targeted at the data center and networking markets, on the GlobalFoundries FX-14 ASIC platform using the company's 14nm Power Plus (LPP) process. The PHY is DFI 4.0 compatible, and supports 16 – 72-bit interfaces, along with single and multi-rank configurations. Synopsys introduced VIP and UVM source code test suite for Ethernet 200G, supporting 4x5... » read more

Blog Review: July 27
By Jesse Allen - 27 Jul, 2016 - Comments: 0

Mentor's Tom Fitzpatrick investigates how to add new behavior to an existing testbench with the UVM factory class. Synopsys' Srinivas Vijayaragavan and Pooja Gupta dig into new features of SAS 24G, including how its effective speed was doubled to 24G though signaling rate remains at 22.5G. Cadence's Paul McLellan highlights a presentation from the SEMI/Gartner Market Symposium focused on ... » read more

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