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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Research Bits: Dec. 16
By Jesse Allen - 16 Dec, 2024 - Comments: 0

Soft liquid metal vias Researchers from Virginia Tech and University of Pennsylvania found a way to create soft, flexible electric connections through circuit layers. The method could be used for soft robotics and wearable devices. The technique uses liquid metal microdroplets to create a stair-like structure that forms soft vias and planar interconnects through and across circuit layers wi... » read more

Research Bits: Dec. 11
By Jesse Allen - 11 Dec, 2024 - Comments: 0

Photonic AI processor Researchers from Massachusetts Institute of Technology (MIT), Enosemi, and Periplous developed a fully integrated photonic processor that can perform all the key computations of a deep neural network optically on the chip. The chip is fabricated using commercial foundry processes and uses three layers of devices that perform linear and nonlinear operations. A particula... » read more

Blog Review: Dec. 4
By Jesse Allen - 04 Dec, 2024 - Comments: 0

Siemens' Reetika explains how creating and verifying a complete reset tree structure allows designers to trace the flow of reset signals across the design and ensure that every sequential element is tagged correctly within its respective reset domain. Cadence's Durlov Khan suggests DDR5 DIMM Memory Models and Discrete Component Models as part of a flexible approach to validating specific com... » read more

Research Bits: Dec. 3
By Jesse Allen - 03 Dec, 2024 - Comments: 0

Self-assembly of mixed-metal oxide arrays Researchers from North Carolina State University and Iowa State University demonstrated a technique for self-assembling electronic devices. The proof-of-concept work was used to create diodes and transistors with high yield and could be used for more complex electronic devices. “Our self-assembling approach is significantly faster and less expensi... » read more

Research Bits: Nov. 25
By Jesse Allen - 25 Nov, 2024 - Comments: 0

3D-printed ESD protection Researchers from Lawrence Livermore National Laboratory developed a printable elastomeric silicone foam for electronics packaging that provides both mechanical and electrostatic discharge (ESD) protection. The team used a 3D printing technique called direct ink writing (DIW), an extrusion process in which a paste with controlled rheological properties such as elast... » read more

Blog Review: Nov. 20
By Jesse Allen - 20 Nov, 2024 - Comments: 0

Siemens’ Jonathan Muirhead explains why matching and symmetry are so important for analog and RF circuits, especially in topological structures like differential pairs and current mirrors, and introduces checking techniques to ensure compliance. Cadence's Satish Kumar Padhi examines the significance of randomization in PCIe IDE verification, focusing on how it ensures data integrity and en... » read more

Research Bits: Nov. 19
By Jesse Allen - 19 Nov, 2024 - Comments: 0

Starchy nanocomposite films Researchers from Queen Mary University of London created biodegradable, flexible, and electrically conductive nanocomposite films made using potato starch instead of petroleum-based materials. The starch-based films decompose within a month when buried in soil. In addition to starch, the nanocomposite films contain the conductive 2D material MXene. Adjusting the ... » read more

Research Bits: Nov. 11
By Jesse Allen - 11 Nov, 2024 - Comments: 0

Quantum tunneling transistor Researchers from MIT and University of Udine fabricated a transistor that uses ultrathin layers of gallium antimonide and indium arsenide arranged in vertical nanowire heterostructures with a diameter of 6nm. The quantum tunneling effects of the material enable it to simultaneously achieve low-voltage operation and high performance. “This is a technology with ... » read more

Blog Review: Nov. 6
By Jesse Allen - 06 Nov, 2024 - Comments: 0

Cadence's Satish Kumar C explores how the Deferrable Memory Write transaction type in PCIe and CXL can improve latency, efficiency, and performance by delaying certain memory write operations during system bus congestion or until other priority tasks are complete and highlights implementation and verification challenges. Synopsys' Daryl Seitzer and Rahul Thukral point to magnetoresistive RAM... » read more

Research Bits: Nov. 5
By Jesse Allen - 05 Nov, 2024 - Comments: 0

Optical in-memory computing Researchers from the University of Pittsburgh, University of California Santa Barbara, University of Cagliari, and Institute of Science Tokyo propose a resonance-based photonic architecture which leverages the non-reciprocal phase shift in magneto-optical materials to implement photonic in-memory computing. “The materials we use in developing these cells have b... » read more

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