Author's Latest Posts


Blog Review: Sept. 2


Arm's Pranay Prabhat highlights research into zero-power or low-power sensing devices and work toward designing a microcontroller that could fit with DARPA N-ZERO sensors. Mentor's Shivani Joshi provides a primer on the ODB++ standard data exchange file format that generates PCB design data files for use in fabrication, assembly, and test. Cadence's Paul McLellan shares some highlights fr... » read more

Power/Performance Bits: Sept. 1


Cooling sensors with lasers Researchers at the University of Washington developed a way to cool a solid semiconductor sensor component with an infrared laser. The laser was able to cool the solid semiconductor by at least 20 degrees C, or 36 F, below room temperature. The device uses a cantilever, similar to a diving board, that can oscillate in response to thermal energy at room temperatur... » read more

Week In Review: Design, Low Power


Tools & IP Monozukuri unveiled its IC/Package co-design tool, GENIO. GENIO integrates existing silicon and package EDA flows to create full co-design and I/O optimization of complex multi-chip designs.  It works seamlessly across all existing EDA flows and comprises floor planning, I/O planning and end-to-end interconnect planning combined with cross-hierarchical pathfinding optimization.... » read more

Blog Review: Aug. 26


Cadence's Paul McLellan shares some highlights from Hot Chips, including the massive growth in deep learning models, the basics of designing neural network models, and challenges involved in different approaches. Mentor's Colin Walls explores memory management units, its job of translating an address used by the CPU to an alternative address, and why this remapping is desirable and useful. ... » read more

Power/Performance Bits: Aug. 25


AI architecture optimization Researchers at Rice University, Stanford University, University of California Santa Barbara, and Texas A&M University proposed two complementary methods for optimizing data-centric processing. The first, called TIMELY, is an architecture developed for “processing-in-memory” (PIM). A promising PIM platform is resistive random access memory, or ReRAM. Whil... » read more

Week In Review: Design, Low Power


Tools & IP SiFive announced OpenFive, a self-contained and autonomous business unit that will offer custom silicon solutions with differentiated IP. OpenFive will be led by Dr. Shafy Eltoukhy, SVP, and general manager of OpenFive. OpenFive debuted with a new Die-to-Die (D2D) interface IP portfolio to serve next-generation chipset based designs for networking, HPC, and AI markets. The D2D p... » read more

Blog Review: Aug. 19


Rambus' Scott Best digs into some of the most sophisticated attacks used to target and compromise security chips, such as laser voltage probing, focused ion beam editing, reverse engineering, and NVM extraction, and ways to counter them. Synopsys' Chris Clark proposes a way to identify problems earlier and better ensure safety and reliability in automotive SoCs by moving from a linear develo... » read more

Power/Performance Bits: Aug. 18


Flexible, hole-filled films Researchers from Daegu Gyeongbuk Institute of Science and Technology (DGIST) and Hongik University propose a simple way to make flexible electrodes and thin film transistors last longer: adding lots of tiny holes. A major problem with flexible electronics is the formation of microscopic cracks after repeated bending which can cause the device to lose its conducti... » read more

Week In Review: Design, Low Power


Cadence added new machine learning functionality to its Xcelium Logic Simulator to speed verification closure on randomized regressions. Xcelium ML directly interfaces to the simulation kernel and learns iteratively over an entire simulation regression, guiding the Xcelium randomization kernel on subsequent regression runs to achieve matching coverage with reduced simulation cycles. Kioxia adop... » read more

Blog Review: Aug. 12


Arm's Greg Yeric takes a look at what semiconductor manufacturing might look like in 2030 as the price of equipment rises and possibilities for when the next upgrade to EUV, high numerical aperture, eventually runs out of steam. Synopsys' Taylor Armerding explains the difference between bugs and security flaws and why it's so important to pay attention to potential problems in a design's spe... » read more

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