Blog Review: Aug. 12

Manufacturing in 2030; bugs vs. flaws; netlist basics; rigid-flex.


Arm’s Greg Yeric takes a look at what semiconductor manufacturing might look like in 2030 as the price of equipment rises and possibilities for when the next upgrade to EUV, high numerical aperture, eventually runs out of steam.

Synopsys’ Taylor Armerding explains the difference between bugs and security flaws and why it’s so important to pay attention to potential problems in a design’s specification.

Mentor’s Shivani Joshi explains the basics of netlists and what’s happening behind the scenes of PCB schematic and layout software.

Cadence’s Paul McLellan takes a look at the process of creating rigid-flex PCB designs and the new fabrication challenges that come along with placing components on both the rigid and flexible areas.

Rambus’ Suresh Andani digs into PCIe 5 and the evolution of the standard that is one of the key interfaces for high-speed computing and processing in the data center.

Moortec’s Ramsay Allen contends that monitoring thermal activity is a critical requirement for chips operating within any large complex device.

In a blog for SEMI, Radislav A. Potyrailo, Ed Stetter, Ryotaro Sakauchi, Merry Smith, and Sreeni D. Rao point to the need for environmental air pollution sensors and new developments in the design and manufacture of gas sensors that could make them more prevalent in everyday devices.

Ansys’ Krista Loeffler checks out the new ISO 21448 SOTIF standard aimed at improving automotive safety by ensuring safety functionality performs as intended.

UltraSoC’s Rasadhi Attale and James Keen consider why traditional verification and validation methods fail in assessing automotive cybersecurity and how run-time verification could help.

Nvidia’s Angie Lee highlights an effort to train AI-powered models that can detect patterns of space weather events and predict their Earth-related impacts.

And don’t miss the blogs featured in the latest Auto, Security & Pervasive Computing and Test, Measurement & Analytics newsletters:

Editor in Chief Ed Sperling explains why the price of securing a chip is going down.

Rambus’ Paul Karazuba shows how secure provisioning of cryptographic keys can fight the billions of dollars in counterfeit components.

OneSpin’s Sergio Marchese explains why it’s important for hardware engineers to be talking about security and trust in ASICs, FPGAs, and SoCs.

Tortuga Logic’s Andreas Kuehlmann advises that building secure products requires adjusting business priorities, maturing organizations and processes, and establishing clear metrics.

Flex Logix’s Vinay Mehta outlines the challenges of defining a benchmark to assess inference hardware.

Maxim Integrated’s Christine Young lays out the challenges to maintaining system reliability in the face of natural phenomena and malicious attacks.

Mentor’s Jim Martens and RF Laboratories’ David Zima observe that systematically limiting the design scope at the beginning makes producing a successful layout more likely.

Cadence’s Paul McLellan recounts five industry experts discussing how to bring automation to a safety-aware IP and SoC design flow.

Synopsys’ Morten Christiansen explains how the latest USB specification provides for multiple modes and complex user expectations.

Editor in Chief Ed Sperling contends that making automotive chips more reliable may be the easy part.

proteanTecs’ Yuval Bonen demonstrates how to shift from preventive to predictive maintenance to manage downtime and avoid service outages.

FormFactor’s David Viera examines how specifications associated with 5G devices are driving wafer test requirements.

yieldHUB’s Marie Ryan explains when to add new features to software without detracting from core functions.

Leave a Reply

(Note: This name will be displayed publicly)