Blog Review: Aug. 8


Cadence's Meera Collier provides a primer on the basics of quantum computing, including how quantum gates work using superpositions and how it could impact chip design. Mentor's Dennis Brophy shares a list of resources to help you get up to speed on the recently-approved Portable Test and Stimulus standard, which enables test scenarios to be run across different execution platforms. Synop... » read more

Week In Review: Design, Low Power


Arm acquired Treasure Data, a provider of enterprise data management solutions. Along with Mbed Cloud and the recent acquisition of Stream, which provides connectivity and device management, it will form the basis of Arm's new IoT management platform. Treasure Data was founded in 2011. Terms of the deal were not disclosed, although Bloomberg reported the price at $600 million. UltraSoC n... » read more

Blog Review: Aug. 1


Synopsys' Taylor Armerding explains the recent cyberattack on Singapore's largest healthcare group, SingHealth. The "well-planned" attack compromised the personal information of about a quarter of the country's population, including Prime Minister Lee Hsien Loong. Cadence's Paul McLellan looks at the factors that make China's automotive market much different from the rest of the world and th... » read more

Week In Review: Design, Low Power


Tools & IP Cadence uncorked the latest version of the Sigrity signal integrity analysis family of tools, adding a 3D design and 3D analysis environment integrated with Allegro PCB tools that allows users to import mechanical structures, such as cables and connectors, and merge them with the PCB for modeling and optimization as one structure. It also adds full Rigid-Flex PCB extraction from... » read more

Debug Issues Grow At New Nodes


Debugging and testing chips is becoming more time-consuming, more complicated, and significantly more difficult at advanced nodes as well as in advanced packages. The main problem is that there are so many puzzle pieces, and so many different use cases and demands on those pieces, that it's difficult to keep track of all the changes and potential interactions. Some blocks are "on" sometimes,... » read more

When Bugs Escape


Bugs are a fact of life, and they always have been. But verification methodologies may not have evolved fast enough to keep up with the growing size and complexity of systems. The types of bugs are changing, too. Some people call these corner cases. Others call them outliers. Still another group refers to them as simulation-resistance superbugs. In markets such as automotive, the notion o... » read more

Safety, Security And PPA Tradeoffs


Safety and security are emerging as key design tradeoffs as chips are added into safety-critical markets, adding even more complexity into an already complicated optimization process. In the early days of semiconductor design, performance and area were traded off against each other. Then power became important, and the main tradeoffs became power, performance and area (PPA). But as chips inc... » read more

Blog Review: July 11


Synopsys' Taylor Armerding warns that while significant router vulnerabilities have been known about for years, security mostly hasn't been getting better, leading to a 539% increase in attacks targeting routers since the fourth quarter of 2017. In a video, Mentor's Colin Walls walks through how to deal with the initialization of non-volatile RAM in embedded programming, including suggestion... » read more

Searching For A System Abstraction


Without abstraction, advances in semiconductor design would have stalled decades ago and circuits would remain about the same size as analog blocks. No new abstractions have emerged since the 1990s that have found widespread adoption. The slack was taken up by IP and reuse, but IP blocks are becoming larger and more complex. Verification by isolation is no longer a viable strategy at the system... » read more

The Week In Review: Design


Tools Synopsys revealed a power analysis solution for early SoC design as well as signoff-accurate power and reliability closure. PrimePower has reliability as a major focus, expanding power and reliability signoff and ECO closure capabilities from physical awareness to cell electromigration effects. Supported power types include peak power, average power, clock network power, leakage power, a... » read more

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