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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Research Bits: Mar. 19
By Jesse Allen - 19 Mar, 2024 - Comments: 0

Superconducting loops Researchers from University of California San Diego and University of California Riverside propose using superconducting loops to store and transmit information in a method similar to the human brain. “Our brains have this remarkable gift of associative memory, which we don't really understand,” said Robert C. Dynes, professor of physics at UC San Diego and preside... » read more

Blog Review: Mar. 13
By Jesse Allen - 13 Mar, 2024 - Comments: 0

Cadence's Geeta Arora explains the Address Translation Service in PCIe 6.0, which allows an I/O device to perform its own virtual to physical address translations without relying on the host's CPU to reduce latency and improve overall system performance. Synopsys' John Swanson, Jon Ames, Priyank Shukla, and Varun Agrawal highlight the upcoming 1.6T iteration of the Ethernet standard and the ... » read more

Research Bits: Mar. 11
By Jesse Allen - 11 Mar, 2024 - Comments: 0

Ferroelectric nanosheets Engineers from the University of Sydney, RMIT University, University of New South Wales, and University of Technology Sydney created a liquid metal alloy of tin, zirconium, and hafnium. The alloy has a thin oxide layer crust that enables it to be used to harvest ultra-thin tin oxide nanosheets doped with hafnium zirconium oxide, which could then be 2D printed on a subs... » read more

Blog Review: Mar. 6
By Jesse Allen - 06 Mar, 2024 - Comments: 0

Synopsys' Gandharv Bhatara notes that successfully deploying high-NA EUV will rely on computational lithography to provide accurate modeling of aberrations, compact 3D mask modeling, and expand inverse lithography to full-chip processing. Cadence's John Park argues for using a systematic and automated system for co-design and co-analysis of multi-die packages to reduce the margin for human e... » read more

Startup Funding: February 2024
By Jesse Allen - 06 Mar, 2024 - Comments: 0

A startup developing AI chips dedicated to low-power AI inferencing captured one of the largest rounds of February. The startup, Recogni, already offers a low-power vision inferencing chip. Several other sizeable rounds were focused on the automotive space, with robotaxis, autonomous delivery, and the sensors that enable them. Another active area, power electronics drew funding for several c... » read more

Research Bits: Mar. 5
By Jesse Allen - 05 Mar, 2024 - Comments: 0

Anti-ambipolar transistor Materials scientists from the City University of Hong Kong propose using transistors made of mixed-dimensional nanowires and nanoflakes to create multivalued logic devices. By combining GaAsSb nanowires and MoS2 nanoflakes, the team created a hetero-transistor with anti-ambipolar transfer characteristics, in which positive (holes) and negative (electron) charge car... » read more

Blog Review: Feb. 28
By Jesse Allen - 28 Feb, 2024 - Comments: 0

Synopsys' Emilie Viasnoff suggests that employing virtual sensors when developing an autonomous driving system helps aid in sensor design and minimizes the hazards associated with extensive real-world driving. Cadence's Anthony Ducimo introduces a methodology for embedded BootROM verification that relies only on standard RTL verification toolchains to reveal bugs, identify unused sections of... » read more

Research Bits: Feb. 27
By Jesse Allen - 27 Feb, 2024 - Comments: 0

Phonon-magnon reservoir Researchers from TU Dortmund, Loughborough University, V. E. Lashkaryov Institute of Semiconductor Physics, and University of Nottingham were inspired by the human eye to propose an on-chip phonon-magnon reservoir for neuromorphic computing. In reservoir computing, input signals are mapped into a multidimensional space, which is not trained and only expedites recogni... » read more

Blog Review: Feb. 21
By Jesse Allen - 21 Feb, 2024 - Comments: 0

Siemens' John McMillan digs into physical verification maturity for high-density advanced packaging (HDAP) designs and major differences in the LVS verification flow compared to the well-established process for SoCs. Synopsys' Varun Shah identifies why a cloud adoption framework is key to getting the most out of deploying EDA tools in the cloud, including by ensuring that different types of ... » read more

Research Bits: Feb. 19
By Jesse Allen - 19 Feb, 2024 - Comments: 0

DNA assembly of 3D nanomaterials Scientists from Brookhaven National Laboratory, Columbia University, and Stony Brook University developed a method that uses DNA to instruct molecules to organize themselves into targeted 3D patterns and produce a wide variety of designed metallic and semiconductor 3D nanostructures. “We have been using DNA to program nanoscale materials for more than a de... » read more

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