Author's Latest Posts

Accelerating Design-For-Test Pattern Simulation
By Mentor, a Siemens Business - 23 Mar, 2016 - Comments: 0

The Veloce DFT App presents a true “left shift” improvement for a traditional chip design schedule that requires comprehensive gate-level simulations to develop ATPG, BIST, or functional patterns. It enables running complete patterns for DFT verification in a reasonable time to shorten the pattern development cycle. The Veloce DFT App fits seamlessly into the Veloce ecosystem, enabling a ho... » read more

Automotive Semiconductor Test
By Mentor, a Siemens Business - 16 Mar, 2016 - Comments: 0

We are witnessing the gradual transition of the automobile from a simple means of transportation to a mobile electronic hub. The amount of electronic content in passenger cars continues to grow rapidly. Recent reports indicate that electronics now contribute about 40% of the total costs of a traditional, internal combustion engine car, and this jumps as high as 75% for the growing number of ele... » read more

Power — Usage Shift Leads to Methodology Shift
By Mentor, a Siemens Business - 09 Mar, 2016 - Comments: 0

Power exploration and accurate power calculation of SoCs in the target application environment is getting executive attention due to the fact that companies are missing market windows because of power issues. This makes system-level power analysis and management a key measurement. Verification solutions that provide accurate power analysis data early are critical to making design decisions that... » read more

Developing Effective Design Strategies For Today’s Wearable Devices: Security
By Mentor, a Siemens Business - 03 Mar, 2016 - Comments: 0

We love our wearables, but wearable devices connected to public networks supporting bi-directional data flow make our devices...and us...highly susceptible to attack. Security can no longer be thought of as an “afterthought” to embedded system design; development teams must design in security methods and adopt a security development lifecycle approach that meets the appropriate security lev... » read more

Thermal Characterization of Complex Electronics
By Mentor, a Siemens Business - 24 Feb, 2016 - Comments: 0

This whitepaper describes the role of thermal transient measurement to characterize semiconductor thermal behavior. It focuses on the value measurement derived structure functions provide through interpretation of the heat flow path inside a package for use in thermal characterization, failure diagnosis, and improving simulation thermal model accuracy. Structure functions transform thermal t... » read more

LVS Boxing Helps Designers Knock Out Designs Quickly
By Mentor, a Siemens Business - 18 Feb, 2016 - Comments: 0

Keeping up with the constant demand for better, faster design flow performance while preserving the original layout hierarchy of a design can be very challenging during design verification. Designers must constantly manage tradeoffs between performance, database size, and accuracy. In the early design cycle, using the LVS boxing capabilities of Calibre nmLVS to replace incomplete or missing blo... » read more

Next-Generation RTL Floorplanning
By Mentor, a Siemens Business - 10 Feb, 2016 - Comments: 0

Mentor’s physical RTL synthesis tools, including RealTime Designer and next-generation products, have the unique technology to pull placement ahead of synthesis and address the need for RTL floorplanning. Mentor’s physical RTL synthesis tools offer higher capacity, faster runtimes, optimal QoR, and physical awareness during RTL synthesis by optimizing at a higher level of abstraction and u... » read more

The Future Of Medical Device Certification
By Mentor, a Siemens Business - 04 Feb, 2016 - Comments: 0

Given the critical nature of the functions performed by today’s medical devices, greater scrutiny along with the need for more certifiable software is on this rise. There is more interest today in government standards such as FDA 510K and IEC 62304 for medical device software. Enhanced scrutiny from government agencies can introduce unexpected delays – or even jeopardize the commercial rele... » read more

Beyond UVM Registers — Better, Faster, Smarter
By Mentor, a Siemens Business - 27 Jan, 2016 - Comments: 0

Adoption of SystemVerilog UVM is growing stronger. Verification teams are expanding their knowledge with respect to UVM features and capabilities. These verification teams are using the UVM Register layer with good success. But the UVM Register layer has many moving parts and intricate details. It can be difficult to adopt and it can be difficult to model complex registers. It is a complex syst... » read more

The Future of Package Design Verification: Assembly Design Kits
By Mentor, a Siemens Business - 20 Jan, 2016 - Comments: 0

Chip design companies and package assembly houses have no unified signoff verification process to ensure that an IC package meets manufacturability and performance requirements. Packages need a process that confirms the disparate products they contain can be manufactured within a single package. Mentor Graphics collaborated with Qualcomm and STATS ChipPAC to develop a prototype assembly design ... » read more

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