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RTL Architect: Simply Better RTL


Electronic devices play a key role in society. They connect us to one another through voice, video and chat. They entertain, educate, protect and heal us in new and ever-expanding ways. They have changed the way we work, live and play. Silicon chips are the fast beating heart (2 to 3 billion beats per second) of these devices. For decades, the relentless advancements in semiconductor process te... » read more

DDR5: The Next-Generation Technology For High Performance Computing


The rapid growth in real-time data requirements for cloud services, IoT, high-performance servers and workstations, hyperscale data centers and big data has increased pressure on memory suppliers to improve memory density and speed. This pressure has resulted in a need for new memory technology that goes beyond the current DDR4 limit of 16 Gb single die capacity and speed of 3200MT/s. Click ... » read more

A New Co-Simulation Approach for Tolerance Analysis on Vehicle Propulsion Subsystem


An increasing demand for reducing cost and time effort of the design process via improved CAE (ComputerAided Engineer) tools and methods has characterized the automotive industry over the past two decades. One of the main challenges involves the effective simulation of a vehicle’s propulsion system dealing with different physical domains: several examples have been proposed in the literature ... » read more

Fusion Technology


Learn how the recent semiconductor industry shifts are breaking the traditional RTL-to-GDSII flow, and how the new Synopsys Fusion Technology helps you cross the chasm. To read more, click here. » read more

Exhaustive Verification of Reset Domain Crossings


It is difficult to imagine an aspect of semiconductor development more fundamental than reset. The ability to initialize the entire hardware design and clean all software running through a system-on-chip (SoC) is essential. Stating with a known state avoids propagation of signals with unknown values. Despite the best efforts at verification, lingering corner case bugs may put a system into a st... » read more

Building Security IntoThe DevOps Life Cycle


The primary goal when breaking the build in the CI/CD DevOps life cycle is to treat security issues with the same level of importance as quality and business requirements. If quality or security tests fail, the continuous integration server breaks the build. When the build breaks, the CI/CD pipeline also breaks. Based on the reason for the broken build, appropriate activities such as archite... » read more

Constraint-Based Verification Of Clock Domain Crossings


There are many measures of the ever-growing size and complexity of semiconductor devices: die area, transistor count, gate count, size of memories, amount of parallel processing and more. All these factors mean more time spent in design, but they also have a major impact on verification. Since virtually all industry studies show verification time and effort growing faster than design, this impa... » read more

Testing Embedded MRAM IP For SoCs


The challenges of embedded memory test and repair are well known, including maximizing fault coverage to prevent test escapes and using spare elements to maximize manufacturing yield. With the surge in availability of promising non-volatile memory architectures to augment and potentially replace traditional volatile memories, a new set of SoC level memory test and repair challenges are emerging... » read more

The BSIMM Turns 10


The Building Security In Maturity Model (BSIMM) is a data-driven model developed through the analysis of software security initiatives (SSIs), also known as application/product security programs. BSIMM10 represents the latest evolution of this detailed and sophisticated “measuring stick” for SSIs. Our analysis of real-world data from 122 organizations in eight industry verticals uncovered t... » read more

LPDDR4/4X DRAM Variants and Possible System Configurations


LPDDR is the de-facto standard for main-memory targeting mobile applications such as smartphones and tablets. Low-Power Double Data Rate Synchronous Dynamic Random Access Memories (LPDDR SDRAMs) or DRAMS offer high-performance while consuming significantly lower power than standard DDR memories, such as DDR5/4/3, which are ideal for systems requiring large memory capacity. For this reason, LPDD... » read more

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