Author's Latest Posts


Analysis Of The On-DRAM-Die Read Disturbance Mitigation Method: Per Row Activation Counting


A technical paper titled “Understanding the Security Benefits and Overheads of Emerging Industry Solutions to DRAM Read Disturbance” was published by researchers at ETH Zürich and TOBB University of Economics and Technology. Abstract: "We present the first rigorous security, performance, energy, and cost analyses of the state-of-the-art on-DRAM-die read disturbance mitigation method, Per... » read more

Roadmap To Neuromorphic Computing (Collaboration of 27 Universities/Companies)


A technical paper titled “Roadmap to Neuromorphic Computing with Emerging Technologies” was published by researchers at University College London, Politecnico di Milano, Purdue University, ETH Zurich and numerous other institutions. Summary: "The roadmap is organized into several thematic sections, outlining current computing challenges, discussing the neuromorphic computing approach, ana... » read more

RTL Optimization Via Verified E-Graph Rewriting (Intel, Imperial College London)


A technical paper titled “ROVER: RTL Optimization via Verified E-Graph Rewriting” was published by researchers at Intel Corporation and Imperial College London. Abstract: "Manual RTL design and optimization remains prevalent across the semiconductor industry because commercial logic and high-level synthesis tools are unable to match human designs. Our experience in industrial datapath des... » read more

Programmable Quantum Emitter Formation In Si (Lawrence Berkeley National Lab., UC Berkeley)


A technical paper titled “Programmable quantum emitter formation in silicon” was published by researchers at Lawrence Berkeley National Laboratory and University of California Berkeley. Abstract: "Silicon-based quantum emitters are candidates for large-scale qubit integration due to their single-photon emission properties and potential for spin-photon interfaces with long spin coherence t... » read more

Finely Tuning The Electronic Band Structure of WSe2 With AFM


A technical paper titled “Strain Driven Electrical Bandgap Tuning of Atomically Thin WSe2” was published by researchers at University of Toronto, University of Tokyo,  and Stanford University. Abstract: "Tuning electrical properties of 2D materials through mechanical strain has predominantly focused on n-type 2D materials like MoS2 and WS2, while p-type 2D materials such as WSe2 remain... » read more

2D UltraLow Temperatures, High Performance Quantum


A new technical paper titled "Electrically tunable giant Nernst effect in two-dimensional van der Waals heterostructures" was published by researchers at EPFL and National Institute for Materials Science (Japan). Abstract "The Nernst effect, a transverse thermoelectric phenomenon, has attracted significant attention for its potential in energy conversion, thermoelectrics and spintronics. ... » read more

Resilient And Secure Programmable SoC Accelerator Offload (KAUST)


A technical paper titled “Resilient and Secure Programmable System-on-Chip Accelerator Offload” was published by researchers at King Abdullah University of Science and Technology (KAUST). Abstract: "Computational offload to hardware accelerators is gaining traction due to increasing computational demands and efficiency challenges. Programmable hardware, like FPGAs, offers a promising plat... » read more

Lower Energy, High Performance LLM on FPGA Without Matrix Multiplication


A new technical paper titled "Scalable MatMul-free Language Modeling" was published by UC Santa Cruz, Soochow University, UC Davis, and LuxiTech. Abstract "Matrix multiplication (MatMul) typically dominates the overall computational cost of large language models (LLMs). This cost only grows as LLMs scale to larger embedding dimensions and context lengths. In this work, we show that MatMul... » read more

Overview of Test Strategies for 3DICs


A new technical paper titled "Design-for-Test Solutions for 3D Integrated Circuits" was published by researchers at Duke University, Arizona State University, and NVIDIA. Abstract: "As Moore's Law approaches its limits, 3D integrated circuits (ICs) have emerged as promising alternatives to conventional scaling methodologies. However, the benefits of 3D integration in terms of lower power co... » read more

Nanosized Blocks Self-Assemble In Water To Create Tiny Floating Checkerboards (UC San Diego, Duke)


A technical paper titled “Self-assembly of nanocrystal checkerboard patterns via non-specific interactions” was published by researchers at the University of California San Diego and Duke University. Abstract: "Checkerboard lattices—where the resulting structure is open, porous, and highly symmetric—are difficult to create by self-assembly. Synthetic systems that adopt such structures... » read more

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