Author's Latest Posts


Improving End-to-End Cyber Threat Detection with Quantum Processors Through Hybrid Architecture (Johns Hopkins Univ.)


A new technical paper titled "Cyber Threat Detection Enabled by Quantum Computing" was published by researchers at Johns Hopkins University. Abstract "Threat detection models in cybersecurity must keep up with shifting traffic, strict feature budgets, and noisy hardware, yet even strong classical systems still miss rare or borderline attacks when the data distribution drifts. Small, near-... » read more

Four Architectural Opportunities for LLM Inference Hardware (Google)


A new technical paper titled "Challenges and Research Directions for Large Language Model Inference Hardware" was published by Google. Abstract "Large Language Model (LLM) inference is hard. The autoregressive Decode phase of the underlying Transformer model makes LLM inference fundamentally different from training. Exacerbated by recent AI trends, the primary challenges are memory and in... » read more

Aging Aware Steepening Metric for the Fault Coverage of a Test Set (Purdue Univ.)


A new technical paper titled "Aging Aware Steepening of the Fault Coverage Curve of a Scan Based Transition Fault Test Set" was published by researchers at Purdue University. Abstract "Chip aging may result in hardware defects whose likelihood of occurrence depends on the layout and functional workload at the defect site. In-field testing is important for the detection of defects that occur... » read more

SiGeSn SBFETs at Cryogenic Temperatures (Tu Wien et al)


A new technical paper titled "A Cryogenic Ultra-Thin Body SiGeSn Transistor" was published by researchers at TU Wien, Johannes Kepler University, Universidad de Granada, and Max Planck Institute for Sustainable Materials. Abstract "Transistors capable of operating at cryogenic temperatures are key components for the fast and energy-efficient control and readout of qubits. However, the ultra... » read more

HW-Accelerated Physical AI Framework For Resource-Constrained Edge Devices (ASU)


A new technical paper titled "Enabling Physical AI at the Edge: Hardware-Accelerated Recovery of System Dynamics" was published by researchers at Arizona State University. Abstract "Physical AI at the edge—enabling autonomous systems to understand and predict real-world dynamics in realtime—demands efficient hardware acceleration. Model recovery (MR), which extracts governing equations ... » read more

Sparse Finite Element Problems on Neuromorphic HW (Sandia National Lab)


A new technical paper titled "Solving sparse finite element problems on neuromorphic hardware" was published by researchers at Sandia National Lab. Abstract "The finite element method (FEM) is one of the most important and ubiquitous numerical methods for solving partial differential equations (PDEs) on computers for scientific and engineering discovery. Applying the FEM to larger and mor... » read more

Thermal-Mechanical Optimization of 2.5D Flip-Chip Packages With Glass and Silicon Interposers (Univ. of Ottawa)


A new technical paper titled "Thermo-mechanical co-design of 2.5D flip-chip packages with silicon and glass interposers via finite element analysis and machine learning" was published by researchers at University of Ottawa. Abstract "Advanced 2.5D flip-chip packages with silicon/glass interposers may pose tightly coupled thermo-mechanical trade-offs. This work presents a simulation-driven, ... » read more

Thermal Scanning-Probe Lithography in vdW Heterostructures (Technical University of Denmark)


A new technical paper titled "Gradient Electronic Landscapes in van der Waals Heterostructures" was published by researchers at Technical University of Denmark. Abstract Excerpt "Here, we use thermal scanning-probe lithography to produce smooth topographic landscapes in vdW heterostructures by patterning the thickness of the top hBN flake with nanometer precision." Find the technical p... » read more

A Review Of Acoustic Side-Channel Attacks: An AI View (Penn State Univ.)


A new technical paper titled "A Survey on Acoustic Side-Channel Attacks: An Artificial Intelligence Perspective" was published by researchers at Penn State University. Abstract "Acoustic Side-Channel Attacks (ASCAs) exploit the sound produced by keyboards and other devices to infer sensitive information without breaching software or network defenses. Recent advances in deep learning, large ... » read more

Impact Of On-Chip SRAM Size And Frequency On Energy Efficiency And Performance of LLM Inference (Uppsala Univ.)


A new technical paper titled "Prefill vs. Decode Bottlenecks: SRAM-Frequency Tradeoffs and the Memory-Bandwidth Ceiling" was published by researchers at Uppsala University. Abstract "Energy consumption dictates the cost and environmental impact of deploying Large Language Models. This paper investigates the impact of on-chip SRAM size and operating frequency on the energy efficiency and per... » read more

← Older posts Newer posts →