Author's Latest Posts


Confidentiality-preserving Framework For Secure On-Chip Communication in NoC Architectures


A new technical paper, "Secure Multi-Path Routing with All-or-Nothing Transform for Network-on-Chip Architectures," was published by researchers at University of Florida. Abstract "Ensuring Network-on-Chip (NoC) security is crucial to design trustworthy NoC-based System-on-Chip (SoC) architectures. While there are various threats that exploit on-chip communication vulnerabilities, eavesdrop... » read more

A Verification Framework For Trojan Detection (U. of Kansas, U. of Florida)


A new technical paper "COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events" was published by researchers at University of Kansas and University of Florida. Abstract "Commercial Off-The-Shelf (COTS) hardware, such as microprocessors, are widely adopted in system design due to their ability to reduce development time and cost compared to custom ... » read more

A Novel Side-channel Attack That Utilizes Memory Re-orderings (U. of Washington, Duke, UCSC et al.)


A new technical paper titled "Memory DisOrder: Memory Re-orderings as a Timerless Side-channel" was published by researchers at University of Washington, Duke University, UC Santa Cruz, Raytheon and Microsoft Research. Abstract "To improve efficiency, nearly all parallel processing units (CPUs and GPUs) implement relaxed memory models in which memory operations may be re-ordered, i.e., ex... » read more

Scaling of 2D Semiconductor Nanoribbons for High Performance Transistors (Purdue, NUS et al.)


A new technical paper titled "Scaling of Two-Dimensional Semiconductor Nanoribbons for High-Performance Electronics" was published by researchers at Purdue University, National University of Singapore, Nexstrom Pte. Ltd and Dankook University. Abstract "Monolayer transition metal dichalcogenide (TMD) field-effect transistors (FETs), with their atomically thin bodies, are promising candida... » read more

Co-optimization Approaches For Reliable and Efficient AI Acceleration (Peking University et al.)


A new technical paper titled "The Quest for Reliable AI Accelerators: Cross-Layer Evaluation and Design Optimization" was published by researchers at Peking University and Beijing Advanced Innovation Center for Integrated Circuits. Abstract "As the CMOS technology pushes to the nanoscale, aging effects and process variations have become increasingly pronounced, posing significant reliabilit... » read more

Non-volatile Ferroelectric Silicon Photonics As A Scalable, Heat-free Platform For Energy-efficient Photonic Computing (UPV, iPronics et al.)


A new technical paper titled "High-Speed Non-Volatile Barium Titanate Field Programmable Photonic Gate Array" was published by researchers at Universitat Politècnica de València, iPronics Programmable Photonic, Lumiphase, University of West Attica and CEA-Leti. Abstract "Programmable integrated photonics aims to replicate the versatility of field-programmable gate arrays in the optical ... » read more

Low Temperature Cu-Cu Bonding for Advanced Packaging (NYCU)


A new technical paper titled "Thermal stability enhancement of low temperature Cu-Cu bonding using metal passivation technology for advanced electronic packaging" was published by researchers at National Yang Ming Chiao Tung University. Abstract "This work investigates the thermal stability of Cu-Cu bonding using a thin Ag passivation layer in applications targeting advanced packaging. Co... » read more

Considerations For The Introduction of New EUV Resist Materials To A Fab (KU Leuven, imec)


A new technical paper titled "Process and materials compatibility considerations for introducing novel extreme ultraviolet resists in a fab: a guide for academia and entrepreneurs" was published by researchers at KU Leuven and imec. Abstract Excerpt "Despite having novel ideas, most researchers struggle to introduce their resist into an advanced fab, i.e., a facility where all the industr... » read more

Loss Errors in Error-Corrected Circuits Across A Range Of Quantum Hardware Platforms (MIT, Harvard, QuEra)


A new technical paper titled "Leveraging Qubit Loss Detection in Fault-Tolerant Quantum Algorithms" was published by researchers at MIT, Harvard and QuEra Computing. Abstract "Qubit loss errors constitute a dominant source of noise in many quantum hardware systems, particularly in neutral-atom quantum computers. We develop a theoretical framework to effectively detect and correct loss err... » read more

Ultralow-Loss PIC Platform From Violet to Near-Infrared, CMOS-Foundry Compatible (Caltech, UCSB et al.)


A new technical paper titled "Towards fibre-like loss for photonic integration from violet to near-infrared" was published by researchers at Caltech, UCSB, Leiden University and University of Southampton. Abstract excerpt: "Here we present an ultralow-loss PIC platform based on germano-silicate—the material underlying the extraordinary performance of optical fibre—but realized by a fu... » read more

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