Author's Latest Posts


An All-Optical General-Purpose CPU And Optical Computer Architecture (Akhetonics)


A technical paper titled “An All-Optical General-Purpose CPU and Optical Computer Architecture” was published by researchers at Akhetonics. Abstract: "Energy efficiency of electronic digital processors is primarily limited by the energy consumption of electronic communication and interconnects. The industry is almost unanimously pushing towards replacing both long-haul, as well as local c... » read more

Ultrathin vdW Ferromagnet at Room Temperature (MIT)


A technical paper titled “Current-induced switching of a van der Waals ferromagnet at room temperature” was published by researchers at Massachusetts Institute of Technology (MIT). Abstract: "Recent discovery of emergent magnetism in van der Waals magnetic materials (vdWMM) has broadened the material space for developing spintronic devices for energy-efficient computation. While there has... » read more

K-Fault Resistant Partitioning To Assess Redundancy-Based HW Countermeasures To Fault Injections


A technical paper titled “Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults” was published by researchers at Université Paris-Saclay, Graz University of Technology, lowRISC, University Grenoble Alpes, Thales, and Sorbonne University. Abstract: "To assess the robustness of CPU-based systems against fault injection attacks, it is necessary to analyze the... » read more

Large-Scale Quantum-Processing Architecture Surpassing The Tier of 1000 Atomic Qubits (TU Darmstadt)


A technical paper titled “Supercharged two-dimensional tweezer array with more than 1000 atomic qubits” was published by researchers at Technische Universität Darmstadt (TU Darmstadt). Abstract: "We report on the realization of a large-scale quantum-processing architecture surpassing the tier of 1000 atomic qubits. By tiling multiple microlens-generated tweezer arrays, each operated by a... » read more

An Analytical EM Model For IC Shielding Against HW Attacks


A technical paper titled “Refined Analytical EM Model of IC-Internal Shielding for Hardware-Security and Intra-Device Simulative Framework” was published by researchers at Bar-Ilan University and Rafael Defense Systems. Abstract: "Over the past two decades, the prominence of physical attacks on electronic devices, designed to extract confidential information, has surged. These attacks exp... » read more

Lowering The Computational Cost of Simulation (DOE, Princeton)


A technical paper titled “Accuracy of the explicit energy-conserving particle-in-cell method for under-resolved simulations of capacitively coupled plasma discharges” was published by researchers at Princeton University. Abstract: "The traditional explicit electrostatic momentum-conserving particle-in-cell algorithm requires strict resolution of the electron Debye length to deliver numeri... » read more

A Hypermultiplexed Integrated Tensor Optical Processor (USC, MIT et al.)


A technical paper titled “Hypermultiplexed Integrated Tensor Optical Processor” was published by researchers at the University of Southern California, Massachusetts Institute of Technology (MIT), City University of Hong Kong, and NTT Research. Abstract: "The escalating data volume and complexity resulting from the rapid expansion of artificial intelligence (AI), internet of things (IoT) a... » read more

Efficient Streaming Language Models With Attention Sinks (MIT, Meta, CMU, NVIDIA)


A technical paper titled “Efficient Streaming Language Models with Attention Sinks” was published by researchers at Massachusetts Institute of Technology (MIT), Meta AI, Carnegie Mellon University (CMU), and NVIDIA. Abstract: "Deploying Large Language Models (LLMs) in streaming applications such as multi-round dialogue, where long interactions are expected, is urgently needed but poses tw... » read more

The Benefits Of Curvilinear Full-Chip Inverse Lithography Technology With Mask-Wafer Co-Optimization 


A technical paper titled “Make the impossible possible: use variable-shaped beam mask writers and curvilinear full-chip inverse lithography technology for 193i contacts/vias with mask-wafer co-optimization” was published by researchers at D2S and Micron. Abstract: "Full-chip curvilinear inverse lithography technology (ILT) requires mask writers to write full reticle curvilinear mask patte... » read more

A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog IMC (IBM and ETH Zurich)


A technical paper titled “A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog In-Memory Computing” was published by researchers at IBM Research Europe and IIS-ETH Zurich. Abstract: "Analog In-Memory Computing (AIMC) is an emerging technology for fast and energy-efficient Deep Learning (DL) inference. However, a certain amount of digital post-processing is requ... » read more

← Older posts Newer posts →