Author's Latest Posts


Guidelines For A Single-Nanometer Magnetic Tunnel Junction (MTJ)


A technical paper titled “Single-nanometer CoFeB/MgO magnetic tunnel junctions with high-retention and high-speed capabilities” was published by researchers at Tohoku University, Université de Lorraine, and Inamori Research Institute for Science. Abstract: "Making magnetic tunnel junctions (MTJs) smaller while meeting performance requirements is critical for future electronics with spin-... » read more

LLM Inference on GPUs (Intel)


A technical paper titled “Efficient LLM inference solution on Intel GPU” was published by researchers at Intel Corporation. Abstract: "Transformer based Large Language Models (LLMs) have been widely used in many fields, and the efficiency of LLM inference becomes hot topic in real applications. However, LLMs are usually complicatedly designed in model structure with massive operations and... » read more

Hacking DNA To Make 3D Nanostructures


A technical paper titled “Three-dimensional nanoscale metal, metal oxide, and semiconductor frameworks through DNA-programmable assembly and templating” was published by researchers at Brookhaven National Laboratory, Columbia University, and Stony Brook University. Abstract: "Controlling the three-dimensional (3D) nanoarchitecture of inorganic materials is imperative for enabling their no... » read more

HW/SW Techniques To Regulate Supply Voltage And Clock Frequency Of Intermittently-Computing Devices


A technical paper titled “Dynamic Voltage and Frequency Scaling for Intermittent Computing” was published by researchers at Politecnico di Milano, Georgia Institute of Technology, Lahore University of Management Sciences, and Uppsala University. Abstract: "We present hardware/software techniques to intelligently regulate supply voltage and clock frequency of intermittently-computing devic... » read more

A New Phase-Change Memory For Processing Large Amounts Of Data 


A technical paper titled “Novel nanocomposite-superlattices for low energy and high stability nanoscale phase-change memory” was published by researchers at Stanford University, TSMC, NIST, University of Maryland, Theiss Research and Tianjin University. Abstract: "Data-centric applications are pushing the limits of energy-efficiency in today’s computing systems, including those based on... » read more

Analysis Of Accel-Sim GPGPU Simulator And Model Improvements


A technical paper titled “Analyzing and Improving Hardware Modeling of Accel-Sim” was published by researchers at Universitat Politècnica de Catalunya. Abstract: "GPU architectures have become popular for executing general-purpose programs. Their many-core architecture supports a large number of threads that run concurrently to hide the latency among dependent instructions. In modern GPU... » read more

RISC-V Ultra-Low-Power Edge Accelerators (EPFL)


A technical paper titled “X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller for the Exploration of Ultra-Low-Power Edge Accelerators” was published by researchers at EPFL. Abstract: "The field of edge computing has witnessed remarkable growth owing to the increasing demand for real-time processing of data in applications. However, challenges persist due to limitat... » read more

Heterogeneous Integration of Graphene and Hafnium Oxide Memristors Using Pulsed-Laser Deposition


A technical paper titled “Heterogeneous Integration of Graphene and HfO2 Memristors” was published by researchers at Forschungszentrum Jülich, Jožef Stefan Institute, and Jülich-Aachen Research Alliance (JARA-FIT). Abstract: "The past decade has seen a growing trend toward utilizing (quasi) van der Waals growth for the heterogeneous integration of various materials for advanced electro... » read more

Overview Of Spin-Orbit Torque Vs. Spin-Transfer Torque For MRAM Devices 


A technical paper titled “Perspectives on field-free spin-orbit torque devices for memory and computing applications” was published by researchers at Northwestern University. Abstract: "The emergence of embedded magnetic random-access memory (MRAM) and its integration in mainstream semiconductor manufacturing technology have created an unprecedented opportunity for engineering computing s... » read more

CiM Integration For ML Inference Acceleration


A technical paper titled “WWW: What, When, Where to Compute-in-Memory” was published by researchers at Purdue University. Abstract: "Compute-in-memory (CiM) has emerged as a compelling solution to alleviate high data movement costs in von Neumann machines. CiM can perform massively parallel general matrix multiplication (GEMM) operations in memory, the dominant computation in Machine Lear... » read more

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