Author's Latest Posts


High-Speed Sparse Scanning Kelvin Probe Force Microscopy


A technical paper titled “High-speed mapping of surface charge dynamics using sparse scanning Kelvin probe force microscopy” was published by researchers at Oak Ridge National Laboratory, (ORNL), Sungkyunkwan University, Case Western Reserve University, Flinders University, Bedford Park, and UNSW Sydney. Abstract: "Unraveling local dynamic charge processes is vital for progress in diverse... » read more

Highly Stacked Nanowire FETs To Enhance Drive Current And Transistor Density


A technical paper titled “Fabrication and performance of highly stacked GeSi nanowire field effect transistors” was published by researchers at National Taiwan University. Abstract: "Horizontal gate-all-around field effect transistors (GAAFETs) are used to replace FinFETs due to their good electrostatics and short channel control. Highly stacked nanowire channels are widely believed to en... » read more

Stacked Ferroelectric Memory Array Comprised Of Laterally Gated Ferroelectric Field-Effect Transistors


A technical paper titled “Laterally gated ferroelectric field effect transistor (LG-FeFET) using α-In2Se3  for stacked in-memory computing array” was published by researchers at Samsung Electronics and Sungkyunkwan University. Abstract: "In-memory computing is an attractive alternative for handling data-intensive tasks as it employs parallel processing without the need for data transfe... » read more

Applications Of Large Language Models For Industrial Chip Design (NVIDIA)


A technical paper titled “ChipNeMo: Domain-Adapted LLMs for Chip Design” was published by researchers at NVIDIA. Abstract: "ChipNeMo aims to explore the applications of large language models (LLMs) for industrial chip design. Instead of directly deploying off-the-shelf commercial or open-source LLMs, we instead adopt the following domain adaptation techniques: custom tokenizers, domain-ad... » read more

A Novel Approach To Mitigating RowHammer Attacks And Improving Server Memory System Reliability


A technical paper titled “RAMPART: RowHammer Mitigation and Repair for Server Memory Systems” was published by researchers at Rambus. Abstract: "RowHammer attacks are a growing security and reliability concern for DRAMs and computer systems as they can induce many bit errors that overwhelm error detection and correction capabilities. System-level solutions are needed as process technology... » read more

CMOS-Based HW Topology For Single-Cycle In-Memory XOR/XNOR Operations


A technical paper titled “CMOS-based Single-Cycle In-Memory XOR/XNOR” was published by researchers at University of Tennessee, University of Virginia, and Oak Ridge National Laboratory (ORNL). Abstract: "Big data applications are on the rise, and so is the number of data centers. The ever-increasing massive data pool needs to be periodically backed up in a secure environment. Moreover, a ... » read more

Modulated Electron Microscopy Applied In The Process Monitoring Of Memory Cell And The Defect Inspection Of Floating Circuits


A technical paper titled “In situ electrical property quantification of memory devices by modulated electron microscopy” was published by researchers at Hitachi High-Tech Corporation, KIOXIA Corporation, and Western Digital. Abstract: "E-beam inspection based on voltage-contrast (VC) defect metrology has been widely utilized for failure mode analysis of memory devices. Variation in e-beam... » read more

Discrete Noise Approximation When Modeling The Effects Of Noise On Quantum Circuits


A technical paper titled “The Discrete Noise Approximation in Quantum Circuits” was published by researchers at HQS Quantum Simulations. Abstract: "When modeling the effects of noise on quantum circuits, one often makes the assumption that these effects can be accounted for by individual decoherence events following an otherwise noise-free gate. In this work, we address the validity of th... » read more

A Survey Of Recent Advances And Research Activities In Wireless NoC Security


A technical paper titled “Wireless Network-on-Chip Security Review: Attack Taxonomy, Implications, and Countermeasures” was published by researchers at Macquarie University (Sydney). Abstract: "Network-on-chip (NoC) is a critical on-chip communication framework that underpins high-performance multicore computing and network system architectures. Its adoption has become widespread due to t... » read more

Improving The Retention Characteristics Of 3D NAND Flash Memories


A technical paper titled “3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer” was published by researchers at Myongji University, Soongsil University, and Seoul National University. Abstract: "To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeat... » read more

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