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Customizing A LLM Model For VHDL Design of High-Performance MPUs (IBM)
By Technical Paper Link - 18 May, 2025 - Comments: 0

A new technical paper titled "Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors" was published by researchers at IBM. Abstract "The use of Large Language Models (LLMs) in hardware design has taken off in recent years, principally through its incorporation in tools that increase chip designer productivity. There has been considerable discussion about the ... » read more

Floorplanning Method For Reducing Thermally-Induced Structural Stress In Chiplet Packages (Penn State, Intel, ASU et al.)
By Technical Paper Link - 14 May, 2025 - Comments: 0

A new technical paper titled "STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration" was published by researchers at Pennsylvania State University, Intel, Arizona State University and University of Notre Dame. Abstract "Chiplet-based architectures and advanced packaging has emerged as transformative approaches in semiconductor design. While conventional ph... » read more

Novel Thin Film Growth Technique Of A WBG Sulfide Semiconductor in BEOL Compatible Conditions (USC, LBNL, TSMC)
By Technical Paper Link - 14 May, 2025 - Comments: 0

A new technical paper titled "Textured growth and electrical characterization of Zinc Sulfide on back-end-of-the-line (BEOL) compatible substrates" was published by researchers at USC, Lawrence Berkeley National Laboratory and TSMC. Abstract "Scaling of transistors has enabled continuous improvements in logic device performance, especially through materials engineering. However, surpassing ... » read more

Effects Of Hardware Prefetchers For Scientific Application Kernels Running on High-End Processors
By Technical Paper Link - 14 May, 2025 - Comments: 0

A new technical paper titled "Memory Prefetching Evaluation of Scientific Applications on A Modern HPC Arm-based Processor" was published by researchers at Jülich Supercomputing Centre and KTH Royal Institute of Technology. Abstract "Memory prefetching is a well-known technique for mitigating the negative impact of memory access latencies on memory bandwidth. This problem has become more p... » read more

CFETs: Reliability of Complementary Field-Effect Transistors (TU Munich, IIT)
By Technical Paper Link - 14 May, 2025 - Comments: 0

A technical paper titled "CFET Beyond 3 nm: SRAM Reliability under Design-Time and Run-Time Variability" was published by researchers at TU Munich and IIT Kanpur. Abstract "This work investigates the reliability of complementary field-effect transistors (CFETs) by addressing both design-time variability arising from process variations and run-time variability due to temperature and aging ef... » read more

Embedded GPU: An Open-Source And Configurable RISC-V GPU Platform for TinyAI Devices (EPFL)
By Technical Paper Link - 14 May, 2025 - Comments: 0

A new technical paper titled "e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications" was published by researchers at EPFL. Abstract "Graphics processing units (GPUs) excel at parallel processing, but remain largely unexplored in ultra-low-power edge devices (TinyAI) due to their power and area limitations, as well as the lack of suitable programming... » read more

Comparisons of HW Versus SW Implementation of Warp Level Features in Vortex RISC-V GPU (Georgia Tech, IIT)
By Technical Paper Link - 11 May, 2025 - Comments: 0

A new technical paper titled "Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU" was published by researchers at Georgia Tech and Indian Institute of Technology Bombay. Abstract "RISC-V GPUs present a promising path for supporting GPU applications. Traditionally, GPUs achieve high efficiency through the SPMD (Single Program Multiple Data) programming model. Ho... » read more

Cache Occupancy Attacks Targeting The SLC of Apple M-Series SoCs (Northeastern Univ.)
By Technical Paper Link - 11 May, 2025 - Comments: 0

A new technical paper titled "EXAM: Exploiting Exclusive System-Level Cache in Apple M-Series SoCs for Enhanced Cache Occupancy Attacks" was published by researchers at Northeastern University. Abstract "Cache occupancy attacks exploit the shared nature of cache hierarchies to infer a victim's activities by monitoring overall cache usage, unlike access-driven cache attacks that focus on spe... » read more

Safety Architecture and Approaches for Automotive SW And HW Including ASIL D And AI/ML (Mercedes-Benz, U. Of Washington)
By Technical Paper Link - 11 May, 2025 - Comments: 0

A new technical paper titled "Key Safety Design Overview in AI-driven Autonomous Vehicles" was published by researchers at Mercedes-Benz Research and Development North America and University of Washington . Abstract "With the increasing presence of autonomous SAE level 3 and level 4, which incorporate artificial intelligence software, along with the complex technical challenges they present... » read more

Overview Of Printed And Flexible Electronics: Technology Fundamentals, Design And Practical Applications
By Technical Paper Link - 07 May, 2025 - Comments: 0

A new technical paper titled "Computing with Printed and Flexible Electronics" was published by researchers at Karlsruhe Institute of Technology, Pragmatic Semiconductor Ltd and University of Patras. Abstract "Printed and flexible electronics (PFE) have emerged as the ubiquitous solution for application domains at the extreme edge, where the demands for low manufacturing and operational cos... » read more

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