Author's Latest Posts


Physics-Based Efficient Device Model for Fe-TFTs (Univ. of Florida)


A new technical paper titled "An efficient device model for ferroelectric thin-film transistors" was published by researchers at University of Florida. Abstract "Ferroelectric thin-film transistors (Fe-TFTs) have promising potential for flexible electronics, memory, and neuromorphic computing applications. Here, we report on a physics-based efficient device model for Fe-TFTs that effectivel... » read more

3D Device With BEOL-Compatible Channel And Physical Design for Efficient Double-Side Routing


A new technical paper titled "Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock" was published by researchers at Stanford University, Intel Corporation, and Carnegie Mellon University. Abstract "This paper presents Omni 3D - a 3D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D arbitrarily interleaves ... » read more

Distributed Radar Signal Processing Utilizing A Sparse Array To Obfuscate The Data


A new technical paper titled "Signal processing architecture for a trustworthy 77GHz MIMO Radar" was published by researchers at Fraunhofer FHR, Ruhr University Bochum, and Wavesense Dresden GmbH. Abstract "Radar systems are used in safety critical applications in vehicles, so it is necessary to ensure their functioning is reliable and trustworthy. System-on-chip (SoC) radars, which are com... » read more

3D-Printed Logic Gates and Resettable Fuses, Via Material Extrusion (MIT)


A new technical paper titled "Semiconductor-free, monolithically 3D-printed logic gates and resettable fuses" was published by researchers at MIT. "This work reports the first active electronics fully 3D-printed via material extrusion, i.e. one of the most accessible and versatile additive manufacturing processes. The technology is proof-of-concept demonstrated through the implementation of ... » read more

GPUs: Bandit Based Framework To Dynamically Reduce Energy Consumption


A new technical paper titled "Online Energy Optimization in GPUs: A Multi-Armed Bandit Approach" was published by researchers at Illinois Institute of Technology, Argonne National Lab and Emory University. Abstract "Energy consumption has become a critical design metric and a limiting factor in the development of future computing architectures, from small wearable devices to large-scale lea... » read more

Thermal Modeling For 2.5D And 3D Integrated Chiplets


A new technical paper titled "MFIT: Multi-Fidelity Thermal Modeling for 2.5D and 3D Multi-Chiplet Architectures" was published by researchers at University of Wisconsin–Madison, Washington State University, and University of Ulsan. Abstract: "Rapidly evolving artificial intelligence and machine learning applications require ever-increasing computational capabilities, while monolithic 2D d... » read more

Securing Advanced Packaging Supply Chain With Inherent HW Identifiers Using Imaging Techniques


A new technical paper titled "Fault-marking: defect-pattern leveraged inherent fingerprinting of advanced IC package with thermoreflectance imaging" was published by researchers at University of Florida and University of Cincinnati. "This work visits the existing challenges and limitations of traditional embedded fingerprinting and watermarking approaches, and proposes the notion of inherent... » read more

Improving The Gate Oxide Reliability in Gate First HKMG DRAM Structures (Sungkyunkwan Univ., Samsung)


A new technical paper titled "Novel STI Technology for Enhancing Reliability of High-k/Metal Gate DRAM" was published by researchers at Sungkyunkwan University and Samsung Electronics. Abstract: "The challenges associated with semiconductor are increasing because of the rapid changes in the semiconductor market and the extreme scaling of semiconductors, with some processes reaching their te... » read more

PIO on Current HW Outperforms DMA Over a Range of Payload Sizes In A Number of Different Applications (ETH Zurich)


A new technical paper titled "Rethinking Programmed I/O for Fast Devices, Cheap Cores, and Coherent Interconnects" was published by researchers at ETH Zurich. Abstract: "Conventional wisdom holds that an efficient interface between an OS running on a CPU and a high-bandwidth I/O device should be based on Direct Memory Access (DMA), descriptor rings, and interrupts: DMA offloads transfers fr... » read more

Survey: HW SW Co-Design Approaches Tailored to LLMs


A new technical paper titled "A Survey: Collaborative Hardware and Software Design in the Era of Large Language Models" was published by researchers at Duke University and Johns Hopkins University. Abstract "The rapid development of large language models (LLMs) has significantly transformed the field of artificial intelligence, demonstrating remarkable capabilities in natural language proce... » read more

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