Author's Latest Posts

Pre-Silicon Verification and Validation Methodology Targeting Robust RISC-V Chip Designs (BSC)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Verification and Validation (V&V)-in-the-Loop for RISC-V Design: The Holistic Vision of BZL," was published by researchers at Barcelona Supercomputing Center. Abstract "The Barcelona Zetascale Lab (BZL) project aims to strengthening Europe's capacity in the design and manufacture of RISC-V based high-performance computing chips. In this context, we present a ho... » read more

Foundry-Compatible Grating Couplers Using an Inverse Design Framework (Yale)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Multimode grating couplers via foundry-compliant inverse design," was published by researchers at Yale University. Abstract "We apply a systematic inverse design approach to discover foundry-compliant, multilayer grating couplers that can efficiently couple a number of independent waves from free space to on-chip propagating modes. For visible- and near-infrared co... » read more

SDVs: Modular Drive Architecture Using Power-Packet-Based Sensorless Control (Kyoto U.)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Modular Drive Architecture for Software-defined Vehicles Enabled by Power-packet-based Sensorless Control," was published by researchers at Kyoto University. Abstract "The transition toward software-defined vehicles requires standardization and modularization of hardware decoupled from software, along with centralized electrical/electronic architectures. While elec... » read more

Replacing GPU Compute Dies With PNM-Enabled HBM Cubes For Long-Context Decode Attention (UCSD, Columbia, Yonsei U., NVIDIA, Samsung)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving," was published by researchers at UC San Diego, Columbia University, Yonsei University, NVIDIA, and Samsung. Abstract "All current LLM serving systems place the GPU at the center, from production-level attention-FFN disaggregation to NVIDIA's Rubin GPU-LPU heterogeneous p... » read more

Understanding Why Drain-Current in GAAFETs Deviates from Thermionic Dependence at Negative Gate Voltages (Sandia National Lab, LIST)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Gate-Drain Leakage Enhanced by Drain-Induced Dielectric Barrier Lowering in Gate-All-Around Field Effect Transistors," was published by researchers at Sandia National Laboratories and Luxembourg Institute of Science and Technology. Abstract "Gate-All-Around Field-Effect Transistors (GAAFETs), now entering high-volume production as successors to fin field-effect tra... » read more

Potential Route To Photonic FPCA Using NV Low-Loss Phase Change Material (Oxford)
By Technical Paper Link - 02 May, 2026 - Comments: 0

A new technical paper, "Nonvolatile photonic field-programmable coupler array," was published by researchers at University of Oxford. Abstract "Programmable photonic networks carry out universal unitary functions by independently operating on the amplitude and phase of guided light. Exploiting the reconfigurability and spatiospectral degrees of freedom of these systems, the majority of stat... » read more

Energy-Efficient Liquid Cooling for Advanced Semiconductor Packaging (KAIST)
By Technical Paper Link - 29 Apr, 2026 - Comments: 0

A new technical paper, "Highly energy-efficient manifold microchannel for cooling electronics with a coefficient of performance over 100,000," was published by researchers at KAIST. The study presents a CMOS-compatible manifold microchannel cooler that removes over 2,000 W/cm² using single-phase water at only 8 kPa pressure drop, achieving a record COP of 106,000—a significant improvement... » read more

Microarchitecture Tailored to 3D-Stacked Near-Memory Processing LLM Decoding (U. of Edinburgh, Peking U., Cambridge et al.)
By Technical Paper Link - 28 Apr, 2026 - Comments: 0

A new technical paper, "Rethinking Compute Substrates for 3D-Stacked Near-Memory LLM Decoding: Microarchitecture-Scheduling Co-Design," was published by researchers at University of Edinburgh, Peking University, University of Cambridge, University of Chinese Academy of Sciences, and the Hong Kong University of Science and Technology. Abstract "Large language model (LLM) decoding is a majo... » read more

Rethinking ESD Protection for System-On-Integrated Chiplets (UC Riverside)
By Technical Paper Link - 28 Apr, 2026 - Comments: 0

A new technical paper, "In-SoIC ESD Protection for Chiplet-Based 3D Microsystems: Future Research Directions," was published by researchers at the University of California, Riverside. Abstract "Heterogeneous integration opens a pathway to three-dimensional chiplet-based microsystem chips. Electrostatic discharge reliability is a major challenge to future smart chips featuring rich functio... » read more

Alumina Nanowires Improve Thermal Management in Advanced Packaging (Georgia Tech et al.)
By Technical Paper Link - 28 Apr, 2026 - Comments: 0

A new technical paper, "Epoxy Composites Reinforced with Long Al2O3 Nanowires for Enhanced Thermal Management in Advanced Semiconductor Packaging," was published by researchers at the Georgia Institute of Technology and National Cheng Kung University. Abstract "The rapid increase in heat flux in advanced 2.5D/3D semiconductor packaging places stringent demands on thermal interface materia... » read more

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