中文 English

Author's Latest Posts


Innovative Dual Mark Design For Alignment Verification And Process Monitoring In Advanced Lithography


Improving on product overlay is one of the key challenges when shrinking technology nodes in semiconductor manufacturing. . . . With smart placement of alignment mark pairs in the X and Y direction, it is possible to determine intra-wafer distortion wafer-by-wafer. Both the measurement and modeled results are applied directly as a feed-forward correction to enable wafer level control. In this p... » read more

Replacement Gate High-k/Metal Gate nMOSFETs Using A Self-Aligned Halo-Compensated Channel Implant


A device design technique for boosting output resistance (Rout) characteristics of long-channel halo-doped nMOSFETs for replacement gate (RMG) high-k/metal gate (HK/MG) devices is proposed based on numerical simulations. We show that the self-aligned halo-compensated channel implant (HCCI) that is carried out after dummy poly gate removal provides compensation for the conventional halo doping. ... » read more

High Voltage Applications.


Today’s high-resolution displays and high data transmission speed have been driving the rapidly growing embedded high voltage (eHV) IC market. UMC supports these applications with extensive and proven eHV technologies, while continuing to invest in research and development to provide more and better solutions to meet current and future requirements for the ever-expanding eHV market. Click... » read more

Achieve High Hotspot Detection Accuracy by Pattern Scoring


In this paper, we combined the hotspot pattern library and the rule-based scoring system into a modularized hotspot-checking rule deck running on an automatic flow. Several DFM (design for manufacture) properties criteria will be defined to build a “score board” for hotspot candidates. When hotspots in the input design are highlighted, the scoring system can identify whether a hotspot is a ... » read more